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* Correct Not Equal operator implementation in ice40Tyler2022-10-171-1/+1
| | | I noticed this during my work reimplementing nextpnr, and it seems to be dead and wrong, or at least dead. Either way I think this is what was intended unless anyone can correct me.
* ice40: Merge driving LUT<=2s into carry-only LCsgatecat2022-03-291-0/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Fixing old emails and names in copyrightsgatecat2021-06-121-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Remove redundant code after hashlib movegatecat2021-06-021-46/+0
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add hash() member functionsgatecat2021-06-021-0/+6
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add default base implementation of cluster APIgatecat2021-05-061-1/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-151-3/+9
| | | | | | | | | | | | | | | | | | | "nextpnr.h" is no longer the god header. Important improvements: - Functions in log.h can be used without including BaseCtx/Arch/Context. This means that log_X functions can be called without included "nextpnr.h" - NPNR_ASSERT can be used without including "nextpnr.h" by including "nextpnr_assertions.h". This allows NPNR_ASSERT to be used safely in any header file. - Types defined in "archdefs.h" are now available without including BaseCtx/Arch/Context. This means that utility classes that will be used inside of BaseCtx/Arch/Context can be defined safely in a self-contained header. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-191-21/+0
| | | | | | | | | | | | | | | | | This replaces the arch-specific DelayInfo structure with new DelayPair (min/max only) and DelayQuad (min/max for both rise and fall) structures that form part of common code. This further reduces the amount of arch-specific code; and also provides useful data structures for timing analysis which will need to delay with pairs/quads of delays as it is improved. While there may be a small performance cost to arches that didn't separate the rise/fall cases (arches that aren't currently separating the min/max cases just need to be fixed...) in DelayInfo, my expectation is that inlining will mean this doesn't make much difference. Signed-off-by: gatecat <gatecat@ds0.me>
* ice40: Switch to BaseArchD. Shah2021-02-051-18/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Run "make clangformat".Keith Rothman2021-02-021-5/+3
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Rename Partition -> BelBucket.Keith Rothman2021-02-021-7/+7
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add Partition APIs to ice40, nexus, gowin archs.Keith Rothman2021-02-021-0/+22
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Work around Qt MOC issue with IdString enumsDavid Shah2019-12-271-0/+4
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ice40: add RGB_DRV/LED_DRV_CUR support for u4kSimon Schubert2019-06-101-0/+4
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* ice40: Add timing data for all IO modesDavid Shah2019-01-071-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ice40: Add support for SB_GB_IOSylvain Munaut2018-11-191-0/+1
| | | | | | | | | | During packing we replace them by standard SB_IO cells and create the 'fake' SB_GB that matches that IO site global buffer connection. It's done in a separate pass because we need to make sure the nextpnr iob have been dealt first so we have our final Bel location on the SB_IO. Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* ice40: Introduce the concept of forPadIn SB_GBSylvain Munaut2018-11-191-0/+4
| | | | | | | | | | | | | | Those are cells that are created mainly to handle the various sources a global network can be driven from other than a user net. When the flag is set, this means the global network usually driven by this BEL is in fact driven by something else and so that SB_GB BEL and matching global network can't be used. This is also what gets used to set the extra bits during bitstream generation. Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* Various router1 fixes, Add BelId/WireId/PipId::operator<()Clifford Wolf2018-11-131-0/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ice40: Validity check for LVDS IODavid Shah2018-09-241-0/+5
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Remove obsolete belType memberDavid Shah2018-09-241-1/+0
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Get rid of PortPin and BelType (ice40, generic, docs)Clifford Wolf2018-08-081-33/+8
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Proper ice40 wire typesClifford Wolf2018-08-031-11/+0
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add iCE40 pseudo-pips for lut permutationClifford Wolf2018-08-031-1/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Remove getFrameDecal() APIClifford Wolf2018-08-011-1/+0
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Change DelayInfo semantics to what we actually needClifford Wolf2018-07-211-3/+8
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improve iCE40 and common Loc codeClifford Wolf2018-07-201-2/+0
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ice40: Optimise reset/enable net checkingDavid Shah2018-07-201-0/+1
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Adding cell definition for DSPsDavid Shah2018-07-191-1/+1
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Assign ArchArgs after packingDavid Shah2018-07-181-2/+20
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add ArchNetInfo and ArchCellInfoClifford Wolf2018-07-171-1/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix Ui/Decal handling of active/inactive arch objectsClifford Wolf2018-07-131-0/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fixing hash link problemDavid Shah2018-07-131-1/+1
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Updates from clang-formatClifford Wolf2018-07-121-4/+8
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add Groups APIClifford Wolf2018-07-121-6/+46
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add GUI Decals APIClifford Wolf2018-07-111-0/+22
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Split "arch.h" in "arch.h" and "archdefs.h"Clifford Wolf2018-06-291-0/+138
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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