iCE40/nextpnr - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	gowin: Add the Global Set/Reset primitive	YRabbit	2022-03-12	1	-0/+2
\| \| \| \| \| \| \| \| \|	GSR is added automatically if it was not instantiated by the user explicitly. Compatible with old apicula bases, the functionality does not work, but the crash does not happen --- just a warning. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	refactor: New member functions to replace design_utils	gatecat	2022-02-18	1	-19/+19
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	refactor: Use cell member functions to add ports	gatecat	2022-02-16	1	-20/+14
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	refactor: New NetInfo and CellInfo constructors	gatecat	2022-02-16	1	-7/+3
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*	gowin: Add simplified IO cells processing	YRabbit	2021-12-20	1	-2/+10
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Some models have I/O cells that are IOBUFs, and other types (IBUFs and OBUFs) are obtained by feeding 1 or 0 to the OEN input. This is done with general-purpose routing so it's best to do it here to avoid conflicts. For this purpose, in the new bases, these special cells are of type IOBS (IOB Simplified). The proposed changes are compatible with bases of previous versions of Apycula and do not require changing .CST constraint files. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: Replace the zero delays with reasonable values.	YRabbit	2021-10-09	1	-0/+2
\| \| \| \|	Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: add support for wide LUTs.	YRabbit	2021-10-07	1	-1/+22
\| \| \| \| \| \| \| \| \|	* A hardwired MUX within each logical cell is used. * The delay is equal 0. * No user placement constraints. * The output route contains dummy PIPs. They are ignored by gowin_pack, but it may be worth removing them. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	Fixing old emails and names in copyrights	gatecat	2021-06-12	1	-1/+1
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Using hashlib in arches	gatecat	2021-06-02	1	-1/+1
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	clangformat	David Shah	2020-12-30	1	-1/+1
\| \| \| \|	Signed-off-by: David Shah <dave@ds0.me>
*	Gowin target (#542)	Pepijn de Vos	2020-12-30	1	-0/+142
	* load wires * add slice bels * add IOB * add aliases * local aliases * broken packing stuff * working packer * add constraints * pnr runs1111 * add timing info * constraints * more constraint stuff * add copyright * remove generic reference * remove parameters * remove generic python api * add newline to end of file * some small refactoring * warn on invalid constraints * don't error on missing cell * comment out debugging print * typo * avoid copy * faster empty idstring * remove intermediate variable * no more deadnames * fix cst warnings * increase ripup and epsilon a bit * take single device parameter * add info to readme * gui stubs * Revert 4d03b681a8634e978bd5af73c97665500047e055 * assign ff_used in assignArchInfo * decrease beta for better routability * try to fix CI