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path: root/fpga_interchange/fpga_interchange.cpp
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* Add initial logic for handling dedicated interconnect situations.Keith Rothman2021-02-231-21/+34
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Initial working constant network support!Keith Rothman2021-02-231-9/+106
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Fix sign mismatch.Keith Rothman2021-02-181-1/+1
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Emit fixed attributes to output physical netlist.Keith Rothman2021-02-171-8/+19
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Continue fixes.Keith Rothman2021-02-171-10/+49
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Disable traversal limit when reading logical netlist.Keith Rothman2021-02-171-1/+3
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Small fixes from review.Keith Rothman2021-02-151-1/+1
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add FPGA interchange frontend and backend.Keith Rothman2021-02-151-0/+826
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>