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* Merge pull request #607 from litghost/add_absl_flat_hash_mapgatecat2021-03-091-1/+2
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| * Add absl::flat_hash_map.Keith Rothman2021-03-011-1/+2
* | Merge pull request #609 from YosysHQ/gatecat/sta-v2gatecat2021-03-098-242/+937
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| * | timing: Integration tweaksgatecat2021-03-054-4/+9
| * | timing: Skip route delays for unplaced/nullptr cellsgatecat2021-03-041-1/+6
| * | timing: Replace all users of criticality with new enginegatecat2021-03-044-229/+52
| * | timing: Use new engine in SA except for budget-based modegatecat2021-03-041-10/+7
| * | timing: Use new engine for HeAPgatecat2021-03-043-14/+19
| * | timing: Add support for critical path printinggatecat2021-03-042-0/+69
| * | timing: Slack and criticality computationgatecat2021-03-042-0/+47
| * | timing: Produce plausible Fmax figuregatecat2021-03-042-1/+12
| * | timing: Add Fmax printing for debugginggatecat2021-03-042-0/+23
| * | timing: Add backwards path walkinggatecat2021-03-043-1/+71
| * | timing: Add forward path walkinggatecat2021-03-042-0/+105
| * | timing: Compute domain pairsgatecat2021-03-042-13/+59
| * | timing: Add port-domain trackinggatecat2021-03-043-1/+115
| * | timing: Add topological sort from Yosysgatecat2021-03-043-0/+130
| * | timing: Import cell delays to our own structuresgatecat2021-03-042-0/+123
| * | timing: Data structures for STA rewritegatecat2021-03-041-0/+122
* | | router2: Fix vast perf drop when leaving bounding boxgatecat2021-03-081-1/+1
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* | Merge pull request #604 from litghost/add_counter_testgatecat2021-03-031-0/+2
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| * | Initial LUT rotation logic.Keith Rothman2021-02-261-0/+2
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* | Merge pull request #605 from litghost/add_placement_sanity_checkgatecat2021-03-025-11/+106
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| * Correct spelling of RAII and add missing check in unlock_early.Keith Rothman2021-03-011-10/+19
| * Use scope in router1/2 and placer1.Keith Rothman2021-03-014-10/+18
| * Fix latent bug with context locking in placer HeAP.Keith Rothman2021-02-262-10/+68
| * Add placement sanity check in placer_heap.Keith Rothman2021-02-261-1/+21
* | Prevent trival misplacements in placer1.Keith Rothman2021-02-261-0/+12
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* Remove unused advanced timing constraint APIgatecat2021-02-262-187/+0
* Allow router2 to use routed but not fixed arcs.Keith Rothman2021-02-251-4/+54
* Fix compiler warnings introduced by -Wextragatecat2021-02-253-6/+6
* Merge pull request #591 from litghost/add_constant_networkgatecat2021-02-252-10/+9
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| * Remove some signedness warnings.Keith Rothman2021-02-232-10/+9
* | Merge pull request #597 from litghost/add_dynamic_bitarraygatecat2021-02-241-0/+79
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| * | Fix some bugs found in review.Keith Rothman2021-02-241-5/+2
| * | Add dynamic bitarray to common library.Keith Rothman2021-02-231-0/+82
* | | Merge pull request #595 from litghost/const_cell_infogatecat2021-02-231-2/+2
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| * | Change CellInfo in getBelPinsForCellPin to be const.Keith Rothman2021-02-231-2/+2
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* | Merge pull request #596 from litghost/make_clang_formatgatecat2021-02-232-11/+16
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| * Run "make clangformat" to fix new Bits library.Keith Rothman2021-02-232-11/+16
* | Refactor some common code to CellInfo methodsgatecat2021-02-236-38/+43
* | HeAP: Document legalise_placement_strict bettergatecat2021-02-231-3/+45
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* Demote the 'no clocks' warning to info and make clearergatecat2021-02-201-1/+1
* Merge pull request #592 from YosysHQ/gatecat/rework-delaygatecat2021-02-207-35/+98
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| * python: Bindings for DelayPair and DelayQuadgatecat2021-02-191-0/+25
| * Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-196-35/+38
| * Add DelayPair and DelayQuad structuresgatecat2021-02-191-0/+35
* | clangformatgatecat2021-02-191-1/+2
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* Merge pull request #576 from litghost/add_cell_bel_pin_mappinggatecat2021-02-196-0/+443
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| * Use Bits library for bit instrisics.Keith Rothman2021-02-171-2/+4