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* Fix bug in router2 where router may give up too early.Keith Rothman2021-04-061-1/+13
| | | | | | | | | | Was introduced in #612. The logic before was intended to prevent the router from terminating early when not using a bounding box, but the fix in #612 simply removed that, meaning that the router might terminate early incorrectly. The solution here is to only use the toexplore hysteric once a solution is found. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add "checkPipAvailForNet" to Arch API.Keith Rothman2021-03-221-13/+7
| | | | | | | | This is important for distiguishing valid pseudo pips in the FPGA interchange arch. This also avoids a double or triple lookup of pip->net map. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Moving hash map/set type selection to header.Keith Rothman2021-03-171-8/+4
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Use NEXTPNR_NAMESPACE macro's now that headers are seperated.Keith Rothman2021-03-151-1/+1
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add support for partially routed nets from the placer in router2.Keith Rothman2021-03-121-25/+48
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add diagnostic prints to debug lookahead performance.Keith Rothman2021-03-101-13/+41
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Only depend on Abseil in threaded builds.whitequark2021-03-101-0/+6
| | | | | | Abseil has a hard dependency on threads (not just in the build system but in many places in the base libraries), so there is no way to use it on WASI at the moment.
* Merge pull request #607 from litghost/add_absl_flat_hash_mapgatecat2021-03-091-1/+2
|\ | | | | Add absl::flat_hash_map.
| * Add absl::flat_hash_map.Keith Rothman2021-03-011-1/+2
| | | | | | | | | | | | | | This lowers the CPU cost of using the flat wire map in router2, and should use less memory as well. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Merge pull request #609 from YosysHQ/gatecat/sta-v2gatecat2021-03-091-13/+6
|\ \ | | | | | | Use new timing engine for criticality
| * | timing: Replace all users of criticality with new enginegatecat2021-03-041-13/+6
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | router2: Fix vast perf drop when leaving bounding boxgatecat2021-03-081-1/+1
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* / Use scope in router1/2 and placer1.Keith Rothman2021-03-011-0/+5
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Allow router2 to use routed but not fixed arcs.Keith Rothman2021-02-251-4/+54
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Fix compiler warnings introduced by -Wextragatecat2021-02-251-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* router2: Support for multiple bel pins per cell pingatecat2021-02-101-85/+95
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Start making use of getBelPinsForCellPin APIgatecat2021-02-101-6/+6
| | | | | | | | | | | | This replaces getNetinfoSinkWire with 3 new functions for different use cases. At the moment all existing code has been moved to getNetinfoSinkWire with phys_idx=0 so the build doesn't break; but this won't yet function properly with more than one sink. But it provides a base on which to work on refactoring the routers to support this case. Signed-off-by: gatecat <gatecat@ds0.me>
* cleanup: Spelling fixesD. Shah2021-01-281-1/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* cleanup: Fix compiler warningsD. Shah2021-01-281-1/+2
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* router2: Avoid ripup of critical pathDavid Shah2020-12-011-2/+17
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Make splitting of wires thread-safeDavid Shah2020-12-011-4/+39
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Add per-thread rngDavid Shah2020-12-011-1/+7
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Fix case where src and dst are the sameDavid Shah2020-11-301-1/+4
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Port nextpnr-{ice40,ecp5} to WASI.whitequark2020-05-231-3/+17
| | | | | | | | | | | | | | | | | | | | | This involves very few changes, all typical to WASM ports: * WASM doesn't currently support threads or atomics so those are disabled. * WASM doesn't currently support exceptions so the exception machinery is stubbed out. * WASM doesn't (and can't) have mmap(), so an emulation library is used. That library currently doesn't support MAP_SHARED flags, so MAP_PRIVATE is used instead. There is also an update to bring ECP5 bbasm CMake rules to parity with iCE40 ones, since although it is possible to embed chipdb into nextpnr on WASM, a 200 MB WASM file has very few practical uses. The README is not updated and there is no included toolchain file because at the moment it's not possible to build nextpnr with upstream boost and wasi-libc. Boost requires a patch (merged, will be available in boost 1.74.0), wasi-libc requires a few unmerged patches.
* router2: Prevent overflowDavid Shah2020-03-221-2/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Improve flow and log outputDavid Shah2020-02-031-5/+12
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Add a simple timing heuristicDavid Shah2020-02-031-0/+27
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Make magic numbers configurableDavid Shah2020-02-031-38/+54
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Fix case of undriven unsunk arcsDavid Shah2020-02-031-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Multi-thread in more casesDavid Shah2020-02-031-6/+32
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Flatten wire structureDavid Shah2020-02-031-79/+88
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Experiment with data structuresDavid Shah2020-02-031-36/+63
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Profile nets by route timeDavid Shah2020-02-031-0/+24
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: ImprovementsDavid Shah2020-02-031-12/+17
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: reduce bias cost factorDavid Shah2020-02-031-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: special case improvementDavid Shah2020-02-031-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: reduce memory footprintDavid Shah2020-02-031-21/+28
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: debuggingDavid Shah2020-02-031-2/+6
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: debuggingDavid Shah2020-02-031-1/+6
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: first pass at reserved wiresDavid Shah2020-02-031-3/+65
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: debugging some edge casesDavid Shah2020-02-031-10/+10
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: speedupDavid Shah2020-02-031-1/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Improve backwards routing of some casesDavid Shah2020-02-031-1/+27
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: tweaksDavid Shah2020-02-031-3/+5
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Attempt to fix some stuck routing casesDavid Shah2020-02-031-9/+26
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: DebuggingDavid Shah2020-02-031-1/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Working on multithreadingDavid Shah2020-02-031-1/+59
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Some simple partitioningDavid Shah2020-02-031-0/+44
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Congestion map generationDavid Shah2020-02-031-0/+46
| | | | Signed-off-by: David Shah <dave@ds0.me>
* router2: Add IPIN cost to modelDavid Shah2020-02-031-1/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
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