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* Fix bug in ice40 chipdby.py add_wire() that moves some wires to X0/Y0Clifford Wolf2018-08-041-3/+7
* Add router1 cfg.useEstimate, improve getActualRouteDelayClifford Wolf2018-08-043-8/+31
* Remove SVG functionality from ice40 mainClifford Wolf2018-08-041-31/+0
* Merge branch 'master' of github.com:YosysHQ/nextpnr into lutpermClifford Wolf2018-08-0422-717/+720
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| * Merge pull request #30 from eddiehung/slack_redist_freqEddie Hung2018-08-034-19/+18
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| | * Merge branch 'master' into slack_redist_freqEddie Hung2018-08-0321-699/+704
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| * | Merge pull request #23 from daveshah1/use_placeconstrDavid Shah2018-08-0420-698/+699
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| | * | place_common: Remove excessively verbose debuggingDavid Shah2018-08-041-13/+0
| | * | clangformatDavid Shah2018-08-045-14/+14
| | * | Tidy upDavid Shah2018-08-043-3/+2
| | * | Add constraint weight as a command line optionDavid Shah2018-08-037-8/+27
| | * | Add distance moved metrics, changing heuristicsDavid Shah2018-08-032-1/+31
| | * | placer1: Experiment with adding 'constraint distance' metricDavid Shah2018-08-031-2/+11
| | * | place_common: Fixing accidental chain breakageDavid Shah2018-08-031-4/+7
| | * | Adding constraint satisfaction checks for debuggingDavid Shah2018-08-033-9/+18
| | * | Fixing constraint placement bugsDavid Shah2018-08-035-31/+56
| | * | place_common: Debugging bad relative constraint legalisationDavid Shah2018-08-031-1/+31
| | * | Fixing relative constraint implementationDavid Shah2018-08-032-1/+11
| | * | place_common: Relative constraints working for basic exampleDavid Shah2018-08-031-11/+28
| | * | place_common: Fixing rel legaliser search bugsDavid Shah2018-08-031-3/+3
| | * | Reworking packer and placer to use new generic rel legaliserDavid Shah2018-08-034-10/+18
| | * | place_common.cc: Working on constraint legalisationDavid Shah2018-08-031-13/+133
| | * | place_common: Helper functions for rel. constraintsDavid Shah2018-08-032-0/+126
| | * | Remove old place legaliser, set placement constraints instead (currently igno...David Shah2018-08-0310-679/+288
| * | | ice40: Add SB_GB timing to databaseDavid Shah2018-08-041-1/+5
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| | * Auto frequency only if --freq 0 is setEddie Hung2018-08-034-19/+18
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* | Proper ice40 wire typesClifford Wolf2018-08-035-57/+155
* | Add iCE40 pseudo-pips for lut permutationClifford Wolf2018-08-036-27/+157
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* Merge pull request #21 from daveshah1/promote_logic_globalsClifford Wolf2018-08-031-10/+40
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| * ice40: Promote 'logic' globals as well as clock/enable/resetDavid Shah2018-08-031-10/+40
* | Merge pull request #22 from YosysHQ/routethruClifford Wolf2018-08-034-15/+129
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| * | ice40: Add bitstream gen for routethru LUTsDavid Shah2018-08-031-9/+58
| * | Add LUT route-through pips to iCE40 architecture databaseClifford Wolf2018-08-023-6/+71
* | | Merge pull request #20 from YosysHQ/gui4allMiodrag Milanović2018-08-0324-448/+404
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| * | ecp5: Refresh Bels when they are modifiedDavid Shah2018-08-031-0/+2
| * | Moved to new signal slot syntaxMiodrag Milanovic2018-08-035-50/+47
| * | clangformatMiodrag Milanovic2018-08-025-28/+23
| * | Add names to toolbarsMiodrag Milanovic2018-08-021-4/+4
| * | Document and cleanupMiodrag Milanovic2018-08-024-105/+120
| * | Move common logic to basewindowMiodrag Milanovic2018-08-026-265/+292
| * | Make worker genericMiodrag Milanovic2018-08-025-111/+31
| * | Move generic resources to top levelMiodrag Milanovic2018-08-0210-8/+8
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* | various fixes for generic archMiodrag Milanovic2018-08-022-10/+3
* | Merge pull request #13 from YosysHQ/fix-windows-ctrl-cMiodrag Milanović2018-08-021-0/+13
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| * | Handle CTRL-C for windows buildMiodrag Milanovic2018-08-021-0/+13
* | | Merge pull request #11 from mmicko/project_loadMiodrag Milanović2018-08-021-0/+9
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| * | | preserve command line parameters for project loadMiodrag Milanovic2018-08-021-0/+9
* | | | Merge pull request #15 from YosysHQ/fix-ecp5-msvcMiodrag Milanović2018-08-025-0/+39
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| * | | | Add missing files and missing includes for MSVCMiodrag Milanovic2018-08-025-0/+39
* | | | | Merge pull request #19 from daveshah1/ecp5_fix_tiletypesDavid Shah2018-08-021-1/+1
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