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| * | Add checkers and assertions to router1 and other improvementsClifford Wolf2018-11-102-42/+280
| * | Fixes and cleanups in router1Clifford Wolf2018-11-101-10/+10
| * | Fix log msg typoClifford Wolf2018-11-091-1/+1
| * | Improve router console outputClifford Wolf2018-11-091-10/+13
| * | Fixes and improvements in new routerClifford Wolf2018-11-092-16/+57
| * | Essentially a rewrite router1Clifford Wolf2018-11-092-782/+341
| * | Merge branch 'master' of github.com:YosysHQ/nextpnr into router_improveClifford Wolf2018-11-09225-312/+67446
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| * | | Dispose of far too long routes earlier (use 3x est. delay as limit)Clifford Wolf2018-09-041-12/+21
* | | | Merge pull request #105 from YosysHQ/placer1_tmg_ignoreClifford Wolf2018-11-131-6/+6
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| * | | | [placer1] Tidy up logicEddie Hung2018-11-131-3/+3
| * | | | [placer1] Actually check for TMG_IGNORE!Eddie Hung2018-11-101-1/+1
| * | | | [placer1] Ignore timing of TMG_IGNORE netsEddie Hung2018-11-101-5/+5
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* | | | Merge pull request #112 from pedrovanzella/masterDavid Shah2018-11-133-3/+3
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| * | | | Mark getArchOptions as override in derived classesPedro Vanzella2018-11-133-3/+3
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| | | * timing: Fix compile warningDavid Shah2018-11-121-1/+1
| | | * ecp5: Copy clock constraints during global promotionDavid Shah2018-11-121-0/+7
| | | * timing: Add support for clock constraintsDavid Shah2018-11-126-4/+51
| | | * ecp5: EBR clocking fixDavid Shah2018-11-121-5/+8
| | | * generic: Update arch to new timing APIDavid Shah2018-11-122-3/+18
| | | * ecp5: Update arch to new timing APIDavid Shah2018-11-123-17/+73
| | | * timing: Fix Fmax for clocks with mixed edge usageDavid Shah2018-11-121-10/+11
| | | * archapi: Add getDelayFromNS to improve timing algorithm portabilityDavid Shah2018-11-123-3/+13
| | | * timing: Fix handling of clock inputsDavid Shah2018-11-122-12/+19
| | | * timing: Don't include false startpoints in async pathsDavid Shah2018-11-121-2/+8
| | | * timing: Improve Fmax output and print cross-clock pathsDavid Shah2018-11-123-54/+132
| | | * timing: Multiple clock analysisDavid Shah2018-11-122-9/+31
| | | * Working on multi-clock analysisDavid Shah2018-11-124-191/+276
| | | * timing: iCE40 Arch API changes for clocking infoDavid Shah2018-11-124-24/+77
| | | * Working on adding multiple domains to timing analysisDavid Shah2018-11-121-33/+87
| | | * timing: Implementing parts of new timing APIDavid Shah2018-11-122-0/+96
| | | * timing: Working on a timing constraint APIDavid Shah2018-11-122-1/+105
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* | | Make zoom in/out always display contentMiodrag Milanovic2018-11-121-1/+1
* | | Merge pull request #108 from dlharmon/masterClifford Wolf2018-11-121-0/+4
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| * \ \ Merge branch 'master' of github.com:YosysHQ/nextpnrDarrell Harmon2018-11-111-1/+4
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| * \ \ \ Merge branch 'master' of github.com:YosysHQ/nextpnrDarrell Harmon2018-11-1110-260/+360
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| * | | | | better error message on failure to open JSON fileDarrell Harmon2018-11-111-0/+4
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* | | | | Merge pull request #111 from YosysHQ/issue106David Shah2018-11-111-0/+2
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| * | | | ice40: Don't set colbuf bits for 384David Shah2018-11-111-0/+2
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* | | | [timing] Fix combinational -> combinatorialEddie Hung2018-11-111-2/+2
* | | | Merge pull request #110 from YosysHQ/force_timing_continueEddie Hung2018-11-111-1/+4
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| * | | [timing] Better messaging for failed timing analysis, allow --force toEddie Hung2018-11-111-1/+4
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* | | ecp5: Fix 85k PLL_LRDavid Shah2018-11-111-1/+2
* | | Show wires in tree for ECP5 as wellMiodrag Milanovic2018-11-111-2/+7
* | | multiple selection fixMiodrag Milanovic2018-11-111-1/+14
* | | Pip visible for all archsMiodrag Milanovic2018-11-111-6/+6
* | | Propagate proper ctx, fixes fetchMoreMiodrag Milanovic2018-11-113-13/+14
* | | Sorted out zoomout, works for all nowMiodrag Milanovic2018-11-112-42/+12
* | | show 4th tresllis_io in tile boundsMiodrag Milanovic2018-11-111-1/+1
* | | Merge pull request #93 from YosysHQ/gui_changesMiodrag Milanović2018-11-108-215/+325
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| * | change to const auto&Miodrag Milanovic2018-10-301-1/+1
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