| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | interchange: ci: add RW patch for missing cell bel maps | Alessandro Comodi | 2021-06-11 | 1 | -0/+3 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: ci: update python-interchange tag | Alessandro Comodi | 2021-06-11 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | ci: Bump mistral version | gatecat | 2021-06-05 | 2 | -6/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Remove redundant code after hashlib move | gatecat | 2021-06-02 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Add LIFCL-40 EVN tests | gatecat | 2021-06-01 | 2 | -3/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-05-27 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-05-21 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | gh-actions: interchange: use commit sha as cache key | Alessandro Comodi | 2021-05-20 | 1 | -4/+10 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | ci: Use GH only for Mistral and fpga-interchange | gatecat | 2021-05-15 | 2 | -0/+57 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump version | gatecat | 2021-05-07 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-04-30 | 1 | -2/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-04-20 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #678 from acomodi/initial-fasm-generation | gatecat | 2021-04-14 | 1 | -1/+1 |
| |\ | | | | | interchange: add FASM generation target and clean-up tests | ||||
| | * | gh-actions: increase python-fpga-interchange tag version | Alessandro Comodi | 2021-04-14 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | | ci: Re-enable abseil for interchange CI | gatecat | 2021-04-14 | 1 | -1/+1 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Pin prjoxide commit | gatecat | 2021-04-09 | 2 | -0/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Don't fail-fast for GH actions to allow for easier CI debugging. | Keith Rothman | 2021-04-06 | 1 | -0/+3 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | [interchange] Update interchange CI for new chipdb change. | Keith Rothman | 2021-04-01 | 2 | -3/+2 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | interchange: Fix nexus cmake review comments | gatecat | 2021-03-31 | 1 | -7/+7 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | ci: Build prjoxide only for LIFCL | gatecat | 2021-03-30 | 2 | -7/+8 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Add Nexus LUT test | gatecat | 2021-03-30 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Add Nexus to CI | gatecat | 2021-03-30 | 2 | -1/+10 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | gh-actions: better yosys caching based on version | Alessandro Comodi | 2021-03-26 | 2 | -6/+35 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: add archcheck tests to all-device-test target | Alessandro Comodi | 2021-03-26 | 1 | -2/+0 |
| | | | | | | | | This increases parallelism and should make the FPGA interchange CI faster Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | gh-actions: use ccache and build tools before running tests | Alessandro Comodi | 2021-03-25 | 2 | -40/+105 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | gh-actions: interchange: multiple jobs, one for each device | Alessandro Comodi | 2021-03-24 | 2 | -7/+12 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | gh-actions: remove multi-process arch generation | Alessandro Comodi | 2021-03-23 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | [FPGA interchange] Add support for global buffers from chipdb. | Keith Rothman | 2021-03-23 | 1 | -1/+1 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | Use new parameter definition data in FPGA interchange processing. | Keith Rothman | 2021-03-23 | 1 | -1/+1 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | Increment required python-fpga-interchange version. | Keith Rothman | 2021-03-22 | 1 | -1/+1 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | fpga_interchange: address review comments | Alessandro Comodi | 2021-03-16 | 1 | -2/+4 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | github-actions: use capnp v0.8.0 | Alessandro Comodi | 2021-03-16 | 1 | -3/+3 |
| | | | | | | | This also updates the note in the README for the FPGA interchange Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | github-actions: pin python-fpga-interchange to tag | Alessandro Comodi | 2021-03-16 | 1 | -1/+2 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | github-actions: add basic CI to test FPGA interchange | Alessandro Comodi | 2021-03-16 | 2 | -0/+74 |
| Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
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