diff options
Diffstat (limited to 'ice40/examples')
-rw-r--r-- | ice40/examples/blinky/blinky.pcf | 6 | ||||
-rw-r--r-- | ice40/examples/blinky/blinky.proj | 15 | ||||
-rwxr-xr-x | ice40/examples/blinky/blinky.sh | 8 | ||||
-rw-r--r-- | ice40/examples/blinky/blinky.v | 27 | ||||
-rw-r--r-- | ice40/examples/blinky/blinky.ys | 3 | ||||
-rw-r--r-- | ice40/examples/blinky/blinky_tb.v | 25 | ||||
-rw-r--r-- | ice40/examples/floorplan/.gitignore | 4 | ||||
-rw-r--r-- | ice40/examples/floorplan/floorplan.py | 5 | ||||
-rwxr-xr-x | ice40/examples/floorplan/floorplan.sh | 6 | ||||
-rw-r--r-- | ice40/examples/floorplan/floorplan.v | 22 | ||||
-rw-r--r-- | ice40/examples/floorplan/icebreaker.pcf | 5 |
11 files changed, 126 insertions, 0 deletions
diff --git a/ice40/examples/blinky/blinky.pcf b/ice40/examples/blinky/blinky.pcf new file mode 100644 index 00000000..141dfcc8 --- /dev/null +++ b/ice40/examples/blinky/blinky.pcf @@ -0,0 +1,6 @@ +set_io led1 99 +set_io led2 98 +set_io led3 97 +set_io led4 96 +set_io led5 95 +set_io clki 21 diff --git a/ice40/examples/blinky/blinky.proj b/ice40/examples/blinky/blinky.proj new file mode 100644 index 00000000..f5bb9f88 --- /dev/null +++ b/ice40/examples/blinky/blinky.proj @@ -0,0 +1,15 @@ +{ + "project": { + "version": "1", + "name": "blinky", + "arch": { + "name": "ice40", + "type": "hx1k", + "package": "tq144" + }, + "input": { + "json": "blinky.json", + "pcf": "blinky.pcf" + } + } +} diff --git a/ice40/examples/blinky/blinky.sh b/ice40/examples/blinky/blinky.sh new file mode 100755 index 00000000..a2326fc3 --- /dev/null +++ b/ice40/examples/blinky/blinky.sh @@ -0,0 +1,8 @@ +#!/bin/bash +set -ex +yosys blinky.ys +../nextpnr-ice40 --json blinky.json --pcf blinky.pcf --asc blinky.asc +icepack blinky.asc blinky.bin +icebox_vlog blinky.asc > blinky_chip.v +iverilog -o blinky_tb blinky_chip.v blinky_tb.v +vvp -N ./blinky_tb diff --git a/ice40/examples/blinky/blinky.v b/ice40/examples/blinky/blinky.v new file mode 100644 index 00000000..36eaee86 --- /dev/null +++ b/ice40/examples/blinky/blinky.v @@ -0,0 +1,27 @@ +module blinky ( + input clki, + output led1, + output led2, + output led3, + output led4, + output led5 +); + + SB_GB clk_gb ( + .USER_SIGNAL_TO_GLOBAL_BUFFER(clki), + .GLOBAL_BUFFER_OUTPUT(clk) + ); + + localparam BITS = 5; + localparam LOG2DELAY = 21; + + reg [BITS+LOG2DELAY-1:0] counter = 0; + reg [BITS-1:0] outcnt; + + always @(posedge clk) begin + counter <= counter + 1; + outcnt <= counter >> LOG2DELAY; + end + + assign {led1, led2, led3, led4, led5} = outcnt ^ (outcnt >> 1); +endmodule diff --git a/ice40/examples/blinky/blinky.ys b/ice40/examples/blinky/blinky.ys new file mode 100644 index 00000000..a5dd2c85 --- /dev/null +++ b/ice40/examples/blinky/blinky.ys @@ -0,0 +1,3 @@ +read_verilog blinky.v +synth_ice40 -top blinky +write_json blinky.json diff --git a/ice40/examples/blinky/blinky_tb.v b/ice40/examples/blinky/blinky_tb.v new file mode 100644 index 00000000..f80b5e64 --- /dev/null +++ b/ice40/examples/blinky/blinky_tb.v @@ -0,0 +1,25 @@ +module blinky_tb; + reg clk; + always #5 clk = (clk === 1'b0); + + wire led1, led2, led3, led4, led5; + + chip uut ( + .io_0_8_1(clk), + .io_13_12_1(led1), + .io_13_12_0(led2), + .io_13_11_1(led3), + .io_13_11_0(led4), + .io_13_9_1(led5) + ); + + initial begin + // $dumpfile("blinky_tb.vcd"); + // $dumpvars(0, blinky_tb); + repeat (10) begin + repeat (900000) @(posedge clk); + $display(led1, led2, led3, led4, led5); + end + $finish; + end +endmodule diff --git a/ice40/examples/floorplan/.gitignore b/ice40/examples/floorplan/.gitignore new file mode 100644 index 00000000..d93659be --- /dev/null +++ b/ice40/examples/floorplan/.gitignore @@ -0,0 +1,4 @@ +*.json +*.asc +*.bin +__pycache__
\ No newline at end of file diff --git a/ice40/examples/floorplan/floorplan.py b/ice40/examples/floorplan/floorplan.py new file mode 100644 index 00000000..85c53ccd --- /dev/null +++ b/ice40/examples/floorplan/floorplan.py @@ -0,0 +1,5 @@ +ctx.createRectangularRegion("osc", 1, 1, 1, 4) +for cell, cellinfo in ctx.cells: + if "ringosc" in cellinfo.attrs: + print("Floorplanned cell %s" % cell) + ctx.constrainCellToRegion(cell, "osc") diff --git a/ice40/examples/floorplan/floorplan.sh b/ice40/examples/floorplan/floorplan.sh new file mode 100755 index 00000000..e0ed7a64 --- /dev/null +++ b/ice40/examples/floorplan/floorplan.sh @@ -0,0 +1,6 @@ +#!/usr/bin/env bash +set -ex +yosys -p "synth_ice40 -top top -json floorplan.json" floorplan.v +../../../nextpnr-ice40 --up5k --json floorplan.json --pcf icebreaker.pcf --asc floorplan.asc --ignore-loops --pre-place floorplan.py +icepack floorplan.asc floorplan.bin +iceprog floorplan.bin diff --git a/ice40/examples/floorplan/floorplan.v b/ice40/examples/floorplan/floorplan.v new file mode 100644 index 00000000..8f99ed4e --- /dev/null +++ b/ice40/examples/floorplan/floorplan.v @@ -0,0 +1,22 @@ +module top(output LED1, LED2, LED3, LED4, LED5); + localparam N = 31; + wire [N:0] x; + assign x[0] = x[N]; + + genvar ii; + generate + + for (ii = 0; ii < N; ii = ii + 1) begin + (* ringosc *) + SB_LUT4 #(.LUT_INIT(1)) lut_i(.I0(x[ii]), .I1(), .I2(), .I3(), .O(x[ii+1])); + end + endgenerate + + assign clk = x[N]; + + + reg [19:0] ctr; + always @(posedge clk) + ctr <= ctr + 1'b1; + assign {LED5, LED4, LED3, LED2, LED1} = ctr[19:15]; +endmodule diff --git a/ice40/examples/floorplan/icebreaker.pcf b/ice40/examples/floorplan/icebreaker.pcf new file mode 100644 index 00000000..ac7ebf9e --- /dev/null +++ b/ice40/examples/floorplan/icebreaker.pcf @@ -0,0 +1,5 @@ +set_io -nowarn LED1 26 +set_io -nowarn LED2 27 +set_io -nowarn LED3 25 +set_io -nowarn LED4 23 +set_io -nowarn LED5 21 |