diff options
Diffstat (limited to 'ice40/cells.cc')
| -rw-r--r-- | ice40/cells.cc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/ice40/cells.cc b/ice40/cells.cc index 886dae2a..fbb77b0c 100644 --- a/ice40/cells.cc +++ b/ice40/cells.cc @@ -230,7 +230,8 @@ std::unique_ptr<CellInfo> create_ice_cell(Context *ctx, IdString type, std::stri new_cell->params[ctx->id("TEST_MODE")] = "0"; add_port(ctx, new_cell.get(), "BYPASS", PORT_IN); - add_port(ctx, new_cell.get(), "DYNAMICDELAY", PORT_IN); + for (int i = 0; i < 8; i++) + add_port(ctx, new_cell.get(), "DYNAMICDELAY_" + std::to_string(i), PORT_IN); add_port(ctx, new_cell.get(), "EXTFEEDBACK", PORT_IN); add_port(ctx, new_cell.get(), "LATCHINPUTVALUE", PORT_IN); add_port(ctx, new_cell.get(), "REFERENCECLK", PORT_IN); @@ -382,6 +383,10 @@ bool is_clock_port(const BaseCtx *ctx, const PortRef &port) port.port == ctx->id("WCLKN"); if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP")) return port.port == ctx->id("CLK"); + if (is_sb_spram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_SPRAM")) + return port.port == id_CLOCK; + if (is_sb_io(ctx, port.cell)) + return port.port == id_INPUT_CLK || port.port == id_OUTPUT_CLK; return false; } |