diff options
| -rwxr-xr-x | .cirrus/archcheck.sh | 1 | ||||
| -rw-r--r-- | gowin/arch.cc | 28 | ||||
| -rw-r--r-- | gowin/arch.h | 6 |
3 files changed, 21 insertions, 14 deletions
diff --git a/.cirrus/archcheck.sh b/.cirrus/archcheck.sh index 35f115d0..6ff6c043 100755 --- a/.cirrus/archcheck.sh +++ b/.cirrus/archcheck.sh @@ -5,3 +5,4 @@ ${BUILD_DIR}/nextpnr-ice40 --hx8k --package ct256 --test ${BUILD_DIR}/nextpnr-ice40 --up5k --package sg48 --test ${BUILD_DIR}/nextpnr-ecp5 --um5g-25k --package CABGA381 --test ${BUILD_DIR}/nextpnr-nexus --device LIFCL-40-9BG400CES --test +${BUILD_DIR}/nextpnr-gowin --device GW1N-UV4LQ144C6/I5 --test diff --git a/gowin/arch.cc b/gowin/arch.cc index 58df773c..b817dae0 100644 --- a/gowin/arch.cc +++ b/gowin/arch.cc @@ -89,6 +89,16 @@ void Arch::addPip(IdString name, IdString type, IdString srcWire, IdString dstWi if (int(tilePipDimZ[loc.x].size()) <= loc.y) tilePipDimZ[loc.x].resize(loc.y + 1); + // Needed to ensure empty tile bel locations + if (int(bels_by_tile.size()) <= loc.x) + bels_by_tile.resize(loc.x + 1); + if (int(bels_by_tile[loc.x].size()) <= loc.y) + bels_by_tile[loc.x].resize(loc.y + 1); + if (int(tileBelDimZ.size()) <= loc.x) + tileBelDimZ.resize(loc.x + 1); + if (int(tileBelDimZ[loc.x].size()) <= loc.y) + tileBelDimZ[loc.x].resize(loc.y + 1); + gridDimX = std::max(gridDimX, loc.x + 1); gridDimY = std::max(gridDimY, loc.y + 1); tilePipDimZ[loc.x][loc.y] = std::max(tilePipDimZ[loc.x][loc.y], loc.z + 1); @@ -124,7 +134,7 @@ void Arch::addBel(IdString name, IdString type, Loc loc, bool gb) tileBelDimZ[loc.x].resize(loc.y + 1); gridDimX = std::max(gridDimX, loc.x + 1); - gridDimY = std::max(gridDimY, loc.x + 1); + gridDimY = std::max(gridDimY, loc.y + 1); tileBelDimZ[loc.x][loc.y] = std::max(tileBelDimZ[loc.x][loc.y], loc.z + 1); } @@ -589,14 +599,14 @@ Arch::Arch(ArchArgs args) : args(args) const PairPOD pip = pips[p][j]; int destrow = row; int destcol = col; - IdString destid(pip.dest_id); - IdString gdestname = wireToGlobal(destrow, destcol, db, destid); + IdString destid(pip.dest_id), gdestid(pip.dest_id); + IdString gdestname = wireToGlobal(destrow, destcol, db, gdestid); if (wires.count(gdestname) == 0) addWire(gdestname, destid, destcol, destrow); int srcrow = row; int srccol = col; - IdString srcid(pip.src_id); - IdString gsrcname = wireToGlobal(srcrow, srccol, db, srcid); + IdString srcid(pip.src_id), gsrcid(pip.src_id); + IdString gsrcname = wireToGlobal(srcrow, srccol, db, gsrcid); if (wires.count(gsrcname) == 0) addWire(gsrcname, srcid, srccol, srcrow); } @@ -701,12 +711,12 @@ Arch::Arch(ArchArgs args) : args(args) const PairPOD pip = pips[p][j]; int destrow = row; int destcol = col; - IdString destid(pip.dest_id); - IdString gdestname = wireToGlobal(destrow, destcol, db, destid); + IdString destid(pip.dest_id), gdestid(pip.dest_id); + IdString gdestname = wireToGlobal(destrow, destcol, db, gdestid); int srcrow = row; int srccol = col; - IdString srcid(pip.src_id); - IdString gsrcname = wireToGlobal(srcrow, srccol, db, srcid); + IdString srcid(pip.src_id), gsrcid(pip.src_id); + IdString gsrcname = wireToGlobal(srcrow, srccol, db, gsrcid); snprintf(buf, 32, "R%dC%d_%s_%s", row + 1, col + 1, srcid.c_str(this), destid.c_str(this)); IdString pipname = id(buf); diff --git a/gowin/arch.h b/gowin/arch.h index 3a1b2534..cdc011aa 100644 --- a/gowin/arch.h +++ b/gowin/arch.h @@ -243,7 +243,7 @@ struct CellTiming std::unordered_map<IdString, std::vector<TimingClockingInfo>> clockingInfo; }; -struct ArchRanges +struct ArchRanges : BaseArchRanges { using ArchArgsT = ArchArgs; // Bels @@ -269,10 +269,6 @@ struct ArchRanges using GroupGroupsRangeT = const std::vector<GroupId> &; // Decals using DecalGfxRangeT = const std::vector<GraphicElement> &; - // Placement validity - using CellTypeRangeT = std::vector<IdString>; - using BelBucketRangeT = std::vector<BelBucketId>; - using BucketBelRangeT = std::vector<BelId>; }; struct Arch : BaseArch<ArchRanges> |