diff options
| -rw-r--r-- | fpga_interchange/arch_pack_io.cc | 4 | ||||
| -rw-r--r-- | fpga_interchange/dedicated_interconnect.cc | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/fpga_interchange/arch_pack_io.cc b/fpga_interchange/arch_pack_io.cc index b018c6bd..38b619a3 100644 --- a/fpga_interchange/arch_pack_io.cc +++ b/fpga_interchange/arch_pack_io.cc @@ -246,7 +246,8 @@ void Arch::pack_ports() if (possible_site_types.empty()) { if (getCtx()->verbose) - log_info("Port '%s' has no possible site types, falling back to all types!\n", port_name.c_str(getCtx())); + log_info("Port '%s' has no possible site types, falling back to all types!\n", + port_name.c_str(getCtx())); possible_site_types = package_pin_site_types; } @@ -316,6 +317,7 @@ void Arch::pack_ports() for (CellInfo *cell : placed_cells) { NPNR_ASSERT(cell->bel != BelId()); if (!isBelLocationValid(cell->bel)) { + explain_bel_status(cell->bel); log_error("Tightly bound BEL %s was not valid!\n", nameOfBel(cell->bel)); } } diff --git a/fpga_interchange/dedicated_interconnect.cc b/fpga_interchange/dedicated_interconnect.cc index 7658d579..5f89e15b 100644 --- a/fpga_interchange/dedicated_interconnect.cc +++ b/fpga_interchange/dedicated_interconnect.cc @@ -457,12 +457,12 @@ void DedicatedInterconnect::explain_bel_status(BelId bel, const CellInfo *cell) // Only check sink BELs. if (net->driver.cell == cell && net->driver.port == port_name) { if (!is_driver_on_net_valid(bel, cell, port_name, net)) { - log_info("Driver %s/%s is not valid on net '%s'", cell->name.c_str(ctx), port_name.c_str(ctx), + log_info("Driver %s/%s is not valid on net '%s'\n", cell->name.c_str(ctx), port_name.c_str(ctx), net->name.c_str(ctx)); } } else { if (!is_sink_on_net_valid(bel, cell, port_name, net)) { - log_info("Sink %s/%s is not valid on net '%s'", cell->name.c_str(ctx), port_name.c_str(ctx), + log_info("Sink %s/%s is not valid on net '%s'\n", cell->name.c_str(ctx), port_name.c_str(ctx), net->name.c_str(ctx)); } } |