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-rw-r--r--ice40/arch.cc8
-rw-r--r--ice40/arch.h1
2 files changed, 5 insertions, 4 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index eb26ae5a..b5e20566 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -575,11 +575,10 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay
{
const auto &driver = net_info->driver;
if (driver.port == id_COUT && sink.port == id_CIN) {
- auto driver_loc = getBelLocation(driver.cell->bel);
- auto sink_loc = getBelLocation(sink.cell->bel);
- if (driver_loc.y == sink_loc.y)
+ if (driver.cell->constr_abs_z && driver.cell->constr_z < 7)
budget = 0;
- else
+ else {
+ NPNR_ASSERT(driver.cell->constr_z == 7);
switch (args.type) {
#ifndef ICE40_HX1K_ONLY
case ArchArgs::HX8K:
@@ -600,6 +599,7 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay
default:
log_error("Unsupported iCE40 chip type.\n");
}
+ }
return true;
}
return false;
diff --git a/ice40/arch.h b/ice40/arch.h
index 90117939..f7d31b0e 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -485,6 +485,7 @@ struct Arch : BaseCtx
Loc getBelLocation(BelId bel) const
{
+ NPNR_ASSERT(bel != BelId());
Loc loc;
loc.x = chip_info->bel_data[bel.index].x;
loc.y = chip_info->bel_data[bel.index].y;