5 files changed, 0 insertions, 10 deletions
diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index 12707a03..9dac70d9 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -500,8 +500,6 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, Id
     return TMG_IGNORE;
 }
 
-bool Arch::isIOCell(const CellInfo *cell) const { return cell->type == id("TRELLIS_IO"); }
-
 std::vector<std::pair<std::string, std::string>> Arch::getTilesAtLocation(int row, int col)
 {
     std::vector<std::pair<std::string, std::string>> ret;
diff --git a/ecp5/arch.h b/ecp5/arch.h
index 7bbb9da5..17f8c58f 100644
--- a/ecp5/arch.h
+++ b/ecp5/arch.h
@@ -831,8 +831,6 @@ struct Arch : BaseCtx
     TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const;
     // Return true if a port is a net
     bool isGlobalNet(const NetInfo *net) const;
-    // Return true if a cell is an IO
-    bool isIOCell(const CellInfo *cell) const;
 
     // -------------------------------------------------
     // Placement validity checks
diff --git a/generic/arch.h b/generic/arch.h
index fb4f3660..46801372 100644
--- a/generic/arch.h
+++ b/generic/arch.h
@@ -215,8 +215,6 @@ struct Arch : BaseCtx
     bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
     // Get the port class, also setting clockPort if applicable
     TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const;
-    // Return true if a cell is an IO
-    bool isIOCell(const CellInfo *cell) const;
 
     bool isValidBelForCell(CellInfo *cell, BelId bel) const;
     bool isBelLocationValid(BelId bel) const;
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 3d31f980..888a0dee 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -968,8 +968,6 @@ bool Arch::isGlobalNet(const NetInfo *net) const
     return net->driver.cell != nullptr && net->driver.port == id_glb_buf_out;
 }
 
-bool Arch::isIOCell(const CellInfo *cell) const { return cell->type == id_sb_io; }
-
 // Assign arch arg info
 void Arch::assignArchInfo()
 {
diff --git a/ice40/arch.h b/ice40/arch.h
index 7cc8495d..cdac1e96 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -792,8 +792,6 @@ struct Arch : BaseCtx
     TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockDomain) const;
     // Return true if a port is a net
     bool isGlobalNet(const NetInfo *net) const;
-    // Return true if a cell is an IO
-    bool isIOCell(const CellInfo *cell) const;
 
     // -------------------------------------------------