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author | gatecat <gatecat@ds0.me> | 2022-03-17 19:24:05 +0000 |
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committer | gatecat <gatecat@ds0.me> | 2022-03-17 19:24:05 +0000 |
commit | 14d53dfec8dba93996f5c2877d60f6ed167d14fb (patch) | |
tree | f49f9dbf30d2fb467018ec92f94eb6288169724b /nexus/arch.cc | |
parent | 2635bab2f1b1a32b2505e0918caa2a91c18ce571 (diff) | |
download | nextpnr-14d53dfec8dba93996f5c2877d60f6ed167d14fb.tar.gz nextpnr-14d53dfec8dba93996f5c2877d60f6ed167d14fb.tar.bz2 nextpnr-14d53dfec8dba93996f5c2877d60f6ed167d14fb.zip |
clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'nexus/arch.cc')
-rw-r--r-- | nexus/arch.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/nexus/arch.cc b/nexus/arch.cc index 39e51a5b..9679c3fb 100644 --- a/nexus/arch.cc +++ b/nexus/arch.cc @@ -486,7 +486,7 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort if (fromPort == id_CLK) return false; // don't include delays that are actually clock-to-out here return lookup_cell_delay(cell->tmg_index, lookup_port(fromPort), lookup_port(toPort), delay); - } else if(cell->type == id_DCS) { + } else if (cell->type == id_DCS) { if (fromPort == id_SELFORCE || fromPort == id_SEL) { return false; } |