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* Some cleanups in verilog examplesClifford Wolf2017-01-091-1/+1
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* Fixed files with CRLF line endingsClifford Wolf2017-01-011-9/+9
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* Timing models for LP and HX devicesClifford Wolf2016-02-011-3/+3
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* added icetime -o/-r optionsClifford Wolf2016-01-181-1/+1
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* Added icetime to examplesClifford Wolf2016-01-172-3/+8
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* Renamed IceBox .txt files to .asc filesClifford Wolf2016-01-011-3/+3
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* Merge pull request #18 from esden/flex_example_makeClifford Wolf2015-12-301-10/+18
|\ | | | | [examples] Made the example Makefiles easier to reuse.
| * [examples] Added sudo prog target to prevent compiling the code as root. And ↵Piotr Esden-Tempski2015-12-301-1/+5
| | | | | | | | made make clean more conservative.
| * [examples] Added the project bin file to prog dependencies.Piotr Esden-Tempski2015-12-281-2/+2
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| * [examples] Made the example Makefiles easier to reuse.Piotr Esden-Tempski2015-12-281-9/+13
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* | remove trailing tab in hx8kboard example verilogMax Bruckner2015-12-291-1/+1
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* Added icestick and hx8kboard examplesClifford Wolf2015-12-084-0/+55