diff options
| -rw-r--r-- | icebox/iceboxdb.py | 1 | ||||
| -rw-r--r-- | icefuzz/cached_ramt.txt | 2 | ||||
| -rw-r--r-- | icefuzz/timings.py | 21 | ||||
| -rw-r--r-- | icefuzz/timings_1k.txt | 146 | ||||
| -rw-r--r-- | icefuzz/tmedges_1k.txt | 83 |
5 files changed, 107 insertions, 146 deletions
diff --git a/icebox/iceboxdb.py b/icebox/iceboxdb.py index 13c1687..80aefe1 100644 --- a/icebox/iceboxdb.py +++ b/icebox/iceboxdb.py @@ -3971,6 +3971,7 @@ B14[0],B14[1],!B15[0],!B15[1] buffer glb_netwk_4 wire_bram/ram/RE !B10[0],B10[1],B11[0],B11[1] buffer glb_netwk_5 glb2local_2 !B12[0],B12[1],B13[0],B13[1] buffer glb_netwk_5 glb2local_3 !B2[0],B2[1],B2[2],B3[0],!B3[2] buffer glb_netwk_5 wire_bram/ram/RCLK +B4[0],B4[1],!B5[0],!B5[1] buffer glb_netwk_5 wire_bram/ram/RCLKE B6[0],B6[1],!B7[0],B7[1] buffer glb_netwk_6 glb2local_0 B8[0],B8[1],!B9[0],B9[1] buffer glb_netwk_6 glb2local_1 B10[0],B10[1],!B11[0],B11[1] buffer glb_netwk_6 glb2local_2 diff --git a/icefuzz/cached_ramt.txt b/icefuzz/cached_ramt.txt index b1e7e02..84c2126 100644 --- a/icefuzz/cached_ramt.txt +++ b/icefuzz/cached_ramt.txt @@ -35,6 +35,7 @@ (0 3) routing glb_netwk_7 <X> wire_bram/ram/RCLK (0 3) routing lc_trk_g1_1 <X> wire_bram/ram/RCLK (0 3) routing lc_trk_g3_1 <X> wire_bram/ram/RCLK +(0 4) routing glb_netwk_5 <X> wire_bram/ram/RCLKE (0 4) routing glb_netwk_7 <X> wire_bram/ram/RCLKE (0 4) routing lc_trk_g2_2 <X> wire_bram/ram/RCLKE (0 4) routing lc_trk_g3_3 <X> wire_bram/ram/RCLKE @@ -101,6 +102,7 @@ (1 3) Enable bit of Mux _span_links/cross_mux_horz_5 => sp12_h_r_10 sp4_h_r_17 (1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_1 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_3 wire_bram/ram/RCLKE +(1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_5 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_7 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g0_2 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g1_3 wire_bram/ram/RCLKE diff --git a/icefuzz/timings.py b/icefuzz/timings.py index 997a047..75215d5 100644 --- a/icefuzz/timings.py +++ b/icefuzz/timings.py @@ -2,6 +2,17 @@ import getopt, sys, re +ignore_cells = set([ + "ADTTRIBUF", "CascadeBuf", "DL", "GIOBUG", "LUT_MUX", "MUX4", + "PLL40_2_FEEDBACK_PATH_DELAY", "PLL40_2_FEEDBACK_PATH_EXTERNAL", + "PLL40_2_FEEDBACK_PATH_PHASE_AND_DELAY", "PLL40_2_FEEDBACK_PATH_SIMPLE", + "PLL40_2F_FEEDBACK_PATH_DELAY", "PLL40_2F_FEEDBACK_PATH_EXTERNAL", + "PLL40_2F_FEEDBACK_PATH_PHASE_AND_DELAY", "PLL40_2F_FEEDBACK_PATH_SIMPLE", + "PLL40_FEEDBACK_PATH_DELAY", "PLL40_FEEDBACK_PATH_EXTERNAL", + "PLL40_FEEDBACK_PATH_PHASE_AND_DELAY", "PLL40_FEEDBACK_PATH_SIMPLE", + "PRE_IO_PIN_TYPE", "sync_clk_enable", "TRIBUF" +]) + database = dict() sdf_inputs = list() txt_inputs = list() @@ -247,6 +258,13 @@ for filename in txt_inputs: ########################################### +# Filter database + +for celltype in ignore_cells: + del database[celltype] + + +########################################### # Create SDF output if output_mode == "sdf": @@ -338,6 +356,9 @@ if output_mode == "html": source_cell = rewrite_celltype(source_cell) sink_cell = rewrite_celltype(sink_cell) + assert source_cell not in ignore_cells + assert sink_cell not in ignore_cells + if source_cell in ["GND", "VCC"]: continue diff --git a/icefuzz/timings_1k.txt b/icefuzz/timings_1k.txt index 63cb9e3..11b3b39 100644 --- a/icefuzz/timings_1k.txt +++ b/icefuzz/timings_1k.txt @@ -1,10 +1,3 @@ -CELL ADTTRIBUF -IOPATH I O 1006.96:1308.15:1590.85 1311.86:1704.25:2072.55 -IOPATH T O 1006.96:1308.15:1590.85 1292.23:1678.75:2041.54 - -CELL CascadeBuf -IOPATH I O 137.402:178.5:217.075 170.116:221:268.76 - CELL CascadeMux IOPATH I O 0:0:0 0:0:0 @@ -14,29 +7,9 @@ IOPATH I O 562.692:731:888.975 516.892:671.5:816.617 CELL ClkMux IOPATH I O 287.889:374:454.825 215.917:280.5:341.118 -CELL DL -HOLD negedge:D negedge:G 0:0:0 -HOLD posedge:D negedge:G 0:0:0 -RECOVERY negedge:RST negedge:G 0:0:0 -RECOVERY negedge:SET negedge:G 0:0:0 -RECOVERY posedge:RST negedge:G 0:0:0 -RECOVERY posedge:SET negedge:G 0:0:0 -REMOVAL negedge:RST negedge:G 0:0:0 -REMOVAL negedge:SET negedge:G 0:0:0 -REMOVAL posedge:RST negedge:G 0:0:0 -REMOVAL posedge:SET negedge:G 0:0:0 -SETUP negedge:D negedge:G 0:0:0 -SETUP posedge:D negedge:G 0:0:0 -IOPATH posedge:G Q 0:0:0 0:0:0 -IOPATH RST Q 0:0:0 0:0:0 -IOPATH SET Q 0:0:0 0:0:0 - CELL gio2CtrlBuf IOPATH I O 0:0:0 0:0:0 -CELL GIOBUG -IOPATH PACKAGE_PIN GLOBAL_BUFFER_OUTPUT 1668.45:2167.5:2635.92 1603.02:2082.5:2532.55 - CELL Glb2LocalMux IOPATH I O 418.748:544:661.563 333.689:433.5:527.183 @@ -115,14 +88,6 @@ IOPATH posedge:clk lcout 503.806:654.5:795.943 503.806:654.5:79 IOPATH sr lcout 0:0:0 558.989:726.189:883.125 IOPATH sr lcout 558.963:726.155:883.083 0:0:0 -CELL LUT_MUX -IOPATH D0 O 77.2066:100.3:121.976 77.2066:100.3:121.976 -IOPATH D1 O 27.1532:35.275:42.8982 27.1532:35.275:42.8982 -IOPATH S O 318.641:413.95:503.408 318.641:413.95:503.408 - -CELL MUX4 -IOPATH I0I1I2I3S0S1 O 0:0:0 0:0:0 - CELL Odrv4 IOPATH I O 327.147:425:516.846 346.775:450.5:547.857 @@ -139,76 +104,12 @@ IOPATH PLLIN PLLOUTCOREB *:*:* *:*:* IOPATH PLLIN PLLOUTGLOBALA *:*:* *:*:* IOPATH PLLIN PLLOUTGLOBALB *:*:* *:*:* -CELL PLL40_2_FEEDBACK_PATH_DELAY -IOPATH PLLIN PLLOUTCOREA 438.376:569.5:692.574 353.318:459:558.194 -IOPATH PLLIN PLLOUTCOREB 942.182:1224:1488.52 994.525:1292:1571.21 -IOPATH PLLIN PLLOUTGLOBALA 556.149:722.5:878.638 588.864:765:930.323 -IOPATH PLLIN PLLOUTGLOBALB 1079.58:1402.5:1705.59 1216.99:1581:1922.67 - -CELL PLL40_2_FEEDBACK_PATH_EXTERNAL -IOPATH PLLIN PLLOUTCOREA 438.376:569.5:692.574 353.318:459:558.194 -IOPATH PLLIN PLLOUTCOREB -248.631:-323:-392.803 -189.745:-246.5:-299.771 -IOPATH PLLIN PLLOUTGLOBALA 556.149:722.5:878.638 588.864:765:930.323 -IOPATH PLLIN PLLOUTGLOBALB -248.631:-323:-392.803 -189.745:-246.5:-299.771 - -CELL PLL40_2_FEEDBACK_PATH_PHASE_AND_DELAY -IOPATH PLLIN PLLOUTCOREA 438.376:569.5:692.574 353.318:459:558.194 -IOPATH PLLIN PLLOUTCOREB 503.806:654.5:795.943 536.52:697:847.628 -IOPATH PLLIN PLLOUTGLOBALA 556.149:722.5:878.638 588.864:765:930.323 -IOPATH PLLIN PLLOUTGLOBALB 647.75:841.5:1023.36 758.98:986:1199.08 - -CELL PLL40_2_FEEDBACK_PATH_SIMPLE -IOPATH PLLIN PLLOUTCOREA 438.376:569.5:692.574 353.318:459:558.194 -IOPATH PLLIN PLLOUTCOREB 1439.44:1870:2274.12 1452.53:1887:2294.8 -IOPATH PLLIN PLLOUTGLOBALA 556.149:722.5:878.638 588.864:765:930.323 -IOPATH PLLIN PLLOUTGLOBALB 1576.85:2048.5:2491.2 1674.99:2176:2646.25 - CELL PLL40_2F IOPATH PLLIN PLLOUTCOREA *:*:* *:*:* IOPATH PLLIN PLLOUTCOREB *:*:* *:*:* IOPATH PLLIN PLLOUTGLOBALA *:*:* *:*:* IOPATH PLLIN PLLOUTGLOBALB *:*:* *:*:* -CELL PLL40_2F_FEEDBACK_PATH_DELAY -IOPATH PLLIN PLLOUTCOREA 1007.61:1309:1591.89 1053.41:1368.5:1664.24 -IOPATH PLLIN PLLOUTCOREB 942.182:1224:1488.52 994.525:1292:1571.21 -IOPATH PLLIN PLLOUTGLOBALA 1374.02:1785:2170.75 1288.96:1674.5:2036.37 -IOPATH PLLIN PLLOUTGLOBALB 1079.58:1402.5:1705.59 1216.99:1581:1922.67 - -CELL PLL40_2F_FEEDBACK_PATH_EXTERNAL -IOPATH PLLIN PLLOUTCOREA -248.631:-323:-392.803 -189.745:-246.5:-299.771 -IOPATH PLLIN PLLOUTCOREB -248.631:-323:-392.803 -189.745:-246.5:-299.771 -IOPATH PLLIN PLLOUTGLOBALA -248.631:-323:-392.803 -189.745:-246.5:-299.771 -IOPATH PLLIN PLLOUTGLOBALB -248.631:-323:-392.803 -189.745:-246.5:-299.771 - -CELL PLL40_2F_FEEDBACK_PATH_PHASE_AND_DELAY -IOPATH PLLIN PLLOUTCOREA 569.235:739.5:899.312 595.407:773.5:940.66 -IOPATH PLLIN PLLOUTCOREB 503.806:654.5:795.943 536.52:697:847.628 -IOPATH PLLIN PLLOUTGLOBALA 942.182:1224:1488.52 830.952:1079.5:1312.79 -IOPATH PLLIN PLLOUTGLOBALB 647.75:841.5:1023.36 758.98:986:1199.08 - -CELL PLL40_2F_FEEDBACK_PATH_SIMPLE -IOPATH PLLIN PLLOUTCOREA 1504.87:1955:2377.49 1511.42:1963.5:2387.83 -IOPATH PLLIN PLLOUTCOREB 1439.44:1870:2274.12 1452.53:1887:2294.8 -IOPATH PLLIN PLLOUTGLOBALA 1871.28:2431:2956.36 1746.96:2269.5:2759.96 -IOPATH PLLIN PLLOUTGLOBALB 1576.85:2048.5:2491.2 1674.99:2176:2646.25 - -CELL PLL40_FEEDBACK_PATH_DELAY -IOPATH PLLIN PLLOUTCORE 1007.61:1309:1591.89 1053.41:1368.5:1664.24 -IOPATH PLLIN PLLOUTGLOBAL 1374.02:1785:2170.75 1288.96:1674.5:2036.37 - -CELL PLL40_FEEDBACK_PATH_EXTERNAL -IOPATH PLLIN PLLOUTCORE -248.631:-323:-392.803 -189.745:-246.5:-299.771 -IOPATH PLLIN PLLOUTGLOBAL -248.631:-323:-392.803 -189.745:-246.5:-299.771 - -CELL PLL40_FEEDBACK_PATH_PHASE_AND_DELAY -IOPATH PLLIN PLLOUTCORE 569.235:739.5:899.312 595.407:773.5:940.66 -IOPATH PLLIN PLLOUTGLOBAL 942.182:1224:1488.52 830.952:1079.5:1312.79 - -CELL PLL40_FEEDBACK_PATH_SIMPLE -IOPATH PLLIN PLLOUTCORE 1504.87:1955:2377.49 1511.42:1963.5:2387.83 -IOPATH PLLIN PLLOUTGLOBAL 1871.28:2431:2956.36 1746.96:2269.5:2759.96 - CELL PRE_IO HOLD negedge:CLOCKENABLE posedge:INPUTCLK 0:0:0 HOLD negedge:CLOCKENABLE posedge:OUTPUTCLK 0:0:0 @@ -251,45 +152,6 @@ IOPATH posedge:OUTPUTCLK PADOUT 104.687:136:165.391 130.859 CELL PRE_IO_GBUF IOPATH PADSIGNALTOGLOBALBUFFER GLOBALBUFFEROUTPUT 1313.95:1706.97:2075.86 1170.01:1519.97:1848.45 -CELL PRE_IO_PIN_TYPE -HOLD negedge:CLOCKENABLE posedge:INPUTCLK 0:0:0 -HOLD negedge:CLOCKENABLE posedge:OUTPUTCLK 0:0:0 -HOLD negedge:DOUT0 posedge:OUTPUTCLK 0:0:0 -HOLD negedge:DOUT1 negedge:OUTPUTCLK 0:0:0 -HOLD negedge:OUTPUTENABLE posedge:OUTPUTCLK 0:0:0 -HOLD negedge:PADIN negedge:INPUTCLK 0:0:0 -HOLD negedge:PADIN posedge:INPUTCLK 0:0:0 -HOLD posedge:CLOCKENABLE posedge:INPUTCLK 0:0:0 -HOLD posedge:CLOCKENABLE posedge:OUTPUTCLK 0:0:0 -HOLD posedge:DOUT0 posedge:OUTPUTCLK 0:0:0 -HOLD posedge:DOUT1 negedge:OUTPUTCLK 0:0:0 -HOLD posedge:OUTPUTENABLE posedge:OUTPUTCLK 0:0:0 -HOLD posedge:PADIN negedge:INPUTCLK 0:0:0 -HOLD posedge:PADIN posedge:INPUTCLK 0:0:0 -SETUP negedge:CLOCKENABLE posedge:INPUTCLK 65.4293:85:103.369 -SETUP negedge:CLOCKENABLE posedge:OUTPUTCLK 65.4293:85:103.369 -SETUP negedge:DOUT0 posedge:OUTPUTCLK 65.4293:85:103.369 -SETUP negedge:DOUT1 negedge:OUTPUTCLK 65.4293:85:103.369 -SETUP negedge:OUTPUTENABLE posedge:OUTPUTCLK 65.4293:85:103.369 -SETUP negedge:PADIN negedge:INPUTCLK 1527.97:1985:2413.98 -SETUP negedge:PADIN posedge:INPUTCLK 1527.97:1985:2413.98 -SETUP posedge:CLOCKENABLE posedge:INPUTCLK 71.9722:93.5:113.706 -SETUP posedge:CLOCKENABLE posedge:OUTPUTCLK 71.9722:93.5:113.706 -SETUP posedge:DOUT0 posedge:OUTPUTCLK 71.9722:93.5:113.706 -SETUP posedge:DOUT1 negedge:OUTPUTCLK 71.9722:93.5:113.706 -SETUP posedge:OUTPUTENABLE posedge:OUTPUTCLK 71.9722:93.5:113.706 -SETUP posedge:PADIN negedge:INPUTCLK 1534.51:1993.5:2424.32 -SETUP posedge:PADIN posedge:INPUTCLK 1534.51:1993.5:2424.32 -IOPATH DOUT0 PADOUT 1871.28:2431:2956.36 2087.19:2711.5:3297.48 -IOPATH LATCHINPUTVALUE DIN0 320.604:416.5:506.509 346.775:450.5:547.857 -IOPATH negedge:INPUTCLK DIN1 130.859:170:206.738 130.859:170:206.738 -IOPATH negedge:OUTPUTCLK PADOUT 104.687:136:165.391 130.859:170:206.738 -IOPATH OUTPUTENABLE PADOEN 163.573:212.5:258.423 196.288:255:310.108 -IOPATH PADIN DIN0 575.778:748:909.649 431.833:561:682.237 -IOPATH posedge:INPUTCLK DIN0 130.859:170:206.738 130.859:170:206.738 -IOPATH posedge:OUTPUTCLK PADOEN 104.687:136:165.391 130.859:170:206.738 -IOPATH posedge:OUTPUTCLK PADOUT 104.687:136:165.391 130.859:170:206.738 - CELL SB_PLL40_2F_CORE IOPATH REFERENCECLK PLLOUTCOREA *:*:* *:*:* IOPATH REFERENCECLK PLLOUTCOREB *:*:* *:*:* @@ -664,11 +526,3 @@ IOPATH I O 458.005:595:723.585 503.806:654.5:795.943 CELL SRMux IOPATH I O 431.833:561:682.237 333.689:433.5:527.183 -CELL sync_clk_enable -IOPATH D Q 0:0:0 0:0:0 -IOPATH NC Q 0:0:0 0:0:0 - -CELL TRIBUF -IOPATH D PAD 0:0:0 0:0:0 -IOPATH E PAD 0:0:0 0:0:0 - diff --git a/icefuzz/tmedges_1k.txt b/icefuzz/tmedges_1k.txt index 330be3e..2794758 100644 --- a/icefuzz/tmedges_1k.txt +++ b/icefuzz/tmedges_1k.txt @@ -349,80 +349,160 @@ Sp12to4.O Span4Mux_v.I Span12Mux_s0_h.O LocalMux.I Span12Mux_s0_h.O Sp12to4.I Span12Mux_s0_h.O Span12Mux_s11_h.I +Span12Mux_s0_h.O Span12Mux_s1_v.I Span12Mux_s0_v.O LocalMux.I Span12Mux_s0_v.O Sp12to4.I +Span12Mux_s0_v.O Span12Mux_v.I Span12Mux_s10_h.O LocalMux.I Span12Mux_s10_h.O Sp12to4.I +Span12Mux_s10_h.O Span12Mux_s2_v.I +Span12Mux_s10_h.O Span12Mux_s5_v.I +Span12Mux_s10_h.O Span12Mux_v.I Span12Mux_s10_v.O LocalMux.I Span12Mux_s10_v.O Sp12to4.I +Span12Mux_s10_v.O Span12Mux_s10_h.I Span12Mux_s10_v.O Span12Mux_s5_v.I +Span12Mux_s10_v.O Span12Mux_s8_h.I Span12Mux_s11_h.O LocalMux.I Span12Mux_s11_h.O Sp12to4.I +Span12Mux_s11_h.O Span12Mux_s0_h.I Span12Mux_s11_v.O LocalMux.I Span12Mux_s11_v.O Sp12to4.I Span12Mux_s11_v.O Span12Mux_s4_v.I +Span12Mux_s11_v.O Span12Mux_s8_h.I +Span12Mux_s11_v.O Span12Mux_s9_h.I Span12Mux_s1_h.O LocalMux.I Span12Mux_s1_h.O Sp12to4.I +Span12Mux_s1_h.O Span12Mux_s10_h.I Span12Mux_s1_v.O LocalMux.I Span12Mux_s1_v.O Sp12to4.I +Span12Mux_s1_v.O Span12Mux_v.I Span12Mux_s2_h.O LocalMux.I Span12Mux_s2_h.O Sp12to4.I +Span12Mux_s2_h.O Span12Mux_s0_v.I +Span12Mux_s2_h.O Span12Mux_s10_v.I +Span12Mux_s2_h.O Span12Mux_s11_v.I Span12Mux_s2_h.O Span12Mux_s1_v.I +Span12Mux_s2_h.O Span12Mux_s2_v.I Span12Mux_s2_h.O Span12Mux_s4_v.I +Span12Mux_s2_h.O Span12Mux_s6_v.I Span12Mux_s2_h.O Span12Mux_s8_v.I Span12Mux_s2_h.O Span12Mux_s9_h.I +Span12Mux_s2_h.O Span12Mux_s9_v.I Span12Mux_s2_v.O LocalMux.I Span12Mux_s2_v.O Sp12to4.I +Span12Mux_s2_v.O Span12Mux_s9_h.I Span12Mux_s3_h.O LocalMux.I Span12Mux_s3_h.O Sp12to4.I +Span12Mux_s3_h.O Span12Mux_s10_v.I +Span12Mux_s3_h.O Span12Mux_s11_v.I +Span12Mux_s3_h.O Span12Mux_s1_v.I +Span12Mux_s3_h.O Span12Mux_s2_v.I +Span12Mux_s3_h.O Span12Mux_s4_v.I +Span12Mux_s3_h.O Span12Mux_s6_v.I +Span12Mux_s3_h.O Span12Mux_s7_v.I Span12Mux_s3_h.O Span12Mux_s8_h.I +Span12Mux_s3_h.O Span12Mux_s8_v.I +Span12Mux_s3_h.O Span12Mux_s9_v.I Span12Mux_s3_h.O Span12Mux_v.I Span12Mux_s3_v.O LocalMux.I Span12Mux_s3_v.O Sp12to4.I +Span12Mux_s3_v.O Span12Mux_s8_h.I Span12Mux_s3_v.O Span12Mux_v.I Span12Mux_s4_h.O LocalMux.I Span12Mux_s4_h.O Sp12to4.I +Span12Mux_s4_h.O Span12Mux_s2_v.I +Span12Mux_s4_h.O Span12Mux_s3_v.I +Span12Mux_s4_h.O Span12Mux_s4_v.I +Span12Mux_s4_h.O Span12Mux_s6_v.I Span12Mux_s4_h.O Span12Mux_s7_h.I +Span12Mux_s4_h.O Span12Mux_s7_v.I +Span12Mux_s4_h.O Span12Mux_s8_v.I Span12Mux_s4_v.O LocalMux.I Span12Mux_s4_v.O Sp12to4.I +Span12Mux_s4_v.O Span12Mux_s10_h.I Span12Mux_s4_v.O Span12Mux_s11_v.I +Span12Mux_s4_v.O Span12Mux_s2_h.I +Span12Mux_s4_v.O Span12Mux_s8_h.I Span12Mux_s5_h.O LocalMux.I Span12Mux_s5_h.O Sp12to4.I +Span12Mux_s5_h.O Span12Mux_s10_v.I +Span12Mux_s5_h.O Span12Mux_s11_v.I Span12Mux_s5_h.O Span12Mux_s6_h.I +Span12Mux_s5_h.O Span12Mux_s7_v.I +Span12Mux_s5_h.O Span12Mux_s8_v.I +Span12Mux_s5_h.O Span12Mux_s9_v.I Span12Mux_s5_h.O Span12Mux_v.I Span12Mux_s5_v.O LocalMux.I Span12Mux_s5_v.O Sp12to4.I +Span12Mux_s5_v.O Span12Mux_s10_h.I Span12Mux_s5_v.O Span12Mux_s10_v.I +Span12Mux_s5_v.O Span12Mux_s5_h.I +Span12Mux_s5_v.O Span12Mux_s8_h.I Span12Mux_s6_h.O LocalMux.I Span12Mux_s6_h.O Sp12to4.I +Span12Mux_s6_h.O Span12Mux_s0_v.I +Span12Mux_s6_h.O Span12Mux_s11_v.I +Span12Mux_s6_h.O Span12Mux_s3_v.I Span12Mux_s6_h.O Span12Mux_s5_h.I +Span12Mux_s6_h.O Span12Mux_s5_v.I +Span12Mux_s6_h.O Span12Mux_s7_v.I +Span12Mux_s6_h.O Span12Mux_s8_v.I +Span12Mux_s6_h.O Span12Mux_s9_v.I +Span12Mux_s6_h.O Span12Mux_v.I Span12Mux_s6_v.O LocalMux.I Span12Mux_s6_v.O Sp12to4.I +Span12Mux_s6_v.O Span12Mux_s5_h.I +Span12Mux_s6_v.O Span12Mux_s8_h.I Span12Mux_s6_v.O Span12Mux_s9_v.I Span12Mux_s7_h.O LocalMux.I Span12Mux_s7_h.O Sp12to4.I Span12Mux_s7_h.O Span12Mux_s10_v.I +Span12Mux_s7_h.O Span12Mux_s1_v.I +Span12Mux_s7_h.O Span12Mux_s4_h.I +Span12Mux_s7_h.O Span12Mux_s8_v.I +Span12Mux_s7_h.O Span12Mux_s9_v.I Span12Mux_s7_h.O Span12Mux_v.I Span12Mux_s7_v.O LocalMux.I Span12Mux_s7_v.O Sp12to4.I +Span12Mux_s7_v.O Span12Mux_s10_h.I +Span12Mux_s7_v.O Span12Mux_s11_h.I +Span12Mux_s7_v.O Span12Mux_s6_h.I +Span12Mux_s7_v.O Span12Mux_s7_h.I +Span12Mux_s7_v.O Span12Mux_s8_h.I Span12Mux_s7_v.O Span12Mux_s8_v.I Span12Mux_s8_h.O LocalMux.I Span12Mux_s8_h.O Sp12to4.I Span12Mux_s8_h.O Span12Mux_s10_v.I +Span12Mux_s8_h.O Span12Mux_s11_v.I +Span12Mux_s8_h.O Span12Mux_s2_v.I +Span12Mux_s8_h.O Span12Mux_s3_h.I +Span12Mux_s8_h.O Span12Mux_s3_v.I +Span12Mux_s8_h.O Span12Mux_s4_v.I +Span12Mux_s8_h.O Span12Mux_s6_v.I +Span12Mux_s8_h.O Span12Mux_s7_v.I +Span12Mux_s8_h.O Span12Mux_s8_v.I +Span12Mux_s8_h.O Span12Mux_s9_v.I Span12Mux_s8_h.O Span12Mux_v.I Span12Mux_s8_v.O LocalMux.I Span12Mux_s8_v.O Sp12to4.I +Span12Mux_s8_v.O Span12Mux_s10_h.I +Span12Mux_s8_v.O Span12Mux_s2_h.I Span12Mux_s8_v.O Span12Mux_s7_v.I Span12Mux_s8_v.O Span12Mux_s8_h.I Span12Mux_s9_h.O LocalMux.I Span12Mux_s9_h.O Sp12to4.I Span12Mux_s9_h.O Span12Mux_s0_v.I Span12Mux_s9_h.O Span12Mux_s10_v.I +Span12Mux_s9_h.O Span12Mux_s1_v.I Span12Mux_s9_h.O Span12Mux_s2_h.I Span12Mux_s9_h.O Span12Mux_s2_v.I +Span12Mux_s9_h.O Span12Mux_s4_v.I +Span12Mux_s9_h.O Span12Mux_v.I Span12Mux_s9_v.O LocalMux.I Span12Mux_s9_v.O Sp12to4.I Span12Mux_s9_v.O Span12Mux_s6_v.I +Span12Mux_s9_v.O Span12Mux_s7_h.I Span12Mux_v.O LocalMux.I Span12Mux_v.O Sp12to4.I Span12Mux_v.O Span12Mux_s0_h.I @@ -455,6 +535,7 @@ Span4Mux_h.O Span4Mux_v.I Span4Mux_s0_h.O IoSpan4Mux.I Span4Mux_s0_h.O LocalMux.I Span4Mux_s0_h.O Span4Mux_h.I +Span4Mux_s0_h.O Span4Mux_s0_v.I Span4Mux_s0_h.O Span4Mux_s1_v.I Span4Mux_s0_h.O Span4Mux_s2_v.I Span4Mux_s0_h.O Span4Mux_s3_v.I @@ -462,6 +543,7 @@ Span4Mux_s0_h.O Span4Mux_v.I Span4Mux_s0_v.O IoSpan4Mux.I Span4Mux_s0_v.O LocalMux.I Span4Mux_s0_v.O Span4Mux_h.I +Span4Mux_s0_v.O Span4Mux_s0_h.I Span4Mux_s0_v.O Span4Mux_s1_h.I Span4Mux_s0_v.O Span4Mux_s2_h.I Span4Mux_s0_v.O Span4Mux_s3_h.I @@ -509,6 +591,7 @@ Span4Mux_s3_h.O Span4Mux_v.I Span4Mux_s3_v.O IoSpan4Mux.I Span4Mux_s3_v.O LocalMux.I Span4Mux_s3_v.O Span4Mux_h.I +Span4Mux_s3_v.O Span4Mux_s0_h.I Span4Mux_s3_v.O Span4Mux_s1_h.I Span4Mux_s3_v.O Span4Mux_s2_h.I Span4Mux_s3_v.O Span4Mux_s3_h.I |