Content-Length: 2167 {"jsonrpc":"2.0","id":0,"method":"initialize","params":{"processId":22858,"rootPath":"/home/tgingold/work/vhdl-language-server/tests/002coverage","rootUri":"file:///home/tgingold/work/vhdl-language-server/tests/002coverage","capabilities":{"workspace":{"applyEdit":true,"workspaceEdit":{"documentChanges":true},"didChangeConfiguration":{"dynamicRegistration":true},"didChangeWatchedFiles":{"dynamicRegistration":true},"symbol":{"dynamicRegistration":true,"symbolKind":{"valueSet":[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26]}},"executeCommand":{"dynamicRegistration":true},"configuration":true,"workspaceFolders":true},"textDocument":{"publishDiagnostics":{"relatedInformation":true},"synchronization":{"dynamicRegistration":true,"willSave":true,"willSaveWaitUntil":true,"didSave":true},"completion":{"dynamicRegistration":true,"contextSupport":true,"completionItem":{"snippetSupport":true,"commitCharactersSupport":true,"documentationFormat":["markdown","plaintext"],"deprecatedSupport":true},"completionItemKind":{"valueSet":[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25]}},"hover":{"dynamicRegistration":true,"contentFormat":["markdown","plaintext"]},"signatureHelp":{"dynamicRegistration":true,"signatureInformation":{"documentationFormat":["markdown","plaintext"]}},"definition":{"dynamicRegistration":true},"references":{"dynamicRegistration":true},"documentHighlight":{"dynamicRegistration":true},"documentSymbol":{"dynamicRegistration":true,"symbolKind":{"valueSet":[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26]}},"codeAction":{"dynamicRegistration":true},"codeLens":{"dynamicRegistration":true},"formatting":{"dynamicRegistration":true},"rangeFormatting":{"dynamicRegistration":true},"onTypeFormatting":{"dynamicRegistration":true},"rename":{"dynamicRegistration":true},"documentLink":{"dynamicRegistration":true},"typeDefinition":{"dynamicRegistration":true},"implementation":{"dynamicRegistration":true},"colorProvider":{"dynamicRegistration":true}}},"trace":"off","workspaceFolders":[{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/002coverage","name":"002coverage"}]}}Content-Length: 52 {"jsonrpc":"2.0","method":"initialized","params":{}}Content-Length: 665 {"jsonrpc":"2.0","method":"textDocument/didOpen","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","languageId":"vhdl","version":1,"text":"\nentity adder is\n -- `i0`, `i1`, and the carry-in `ci` are inputs of the adder.\n -- `s` is the sum output, `co` is the carry-out.\n port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit);\nend adder;\n\narchitecture rtl of adder is\nbegin\n -- This full-adder architecture contains two concurrent assignments.\n -- Compute the sum.\n s <= i0 xor i1 xor ci;\n -- Compute the carry.\n co <= (i0 and i1) or (i0 and ci) or (i1 and ci);\nend rtl;\n\n"}}}Content-Length: 170 {"jsonrpc":"2.0","id":1,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 58 {"jsonrpc":"2.0","id":2,"method":"shutdown","params":null}