From efcf7034d651a59c7698b30cf20c1cea6458bb17 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 15 Sep 2021 05:33:52 +0200
Subject: testsuite/gna: add a test and close #1495

---
 testsuite/gna/issue1405/ent.vhdl     | 18 ++++++++++++++++++
 testsuite/gna/issue1405/testsuite.sh | 11 +++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 testsuite/gna/issue1405/ent.vhdl
 create mode 100755 testsuite/gna/issue1405/testsuite.sh

(limited to 'testsuite')

diff --git a/testsuite/gna/issue1405/ent.vhdl b/testsuite/gna/issue1405/ent.vhdl
new file mode 100644
index 000000000..ba718b975
--- /dev/null
+++ b/testsuite/gna/issue1405/ent.vhdl
@@ -0,0 +1,18 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity ent is
+end entity ent;
+
+architecture beh of ent is
+  type t_slv_array is array (natural range <>) of std_logic_vector;
+  function test
+    return t_slv_array is
+    variable v_num_bytes   : integer := 2;
+    variable v_byte_array  : t_slv_array(0 to v_num_bytes-1)(7 downto 0);
+  begin
+    return v_byte_array(0 to v_num_bytes-1);
+  end function;
+begin
+end architecture beh;
diff --git a/testsuite/gna/issue1405/testsuite.sh b/testsuite/gna/issue1405/testsuite.sh
new file mode 100755
index 000000000..bda8f5d14
--- /dev/null
+++ b/testsuite/gna/issue1405/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze ent.vhdl
+elab_simulate ent
+
+clean
+
+echo "Test successful"
-- 
cgit v1.2.3