From c6243752a7b0c64dbd798bb1c45d4f537be77980 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 7 Sep 2021 21:24:17 +0200 Subject: testsuite/gna: add a test for #917 --- testsuite/gna/issue917/dut.vhdl | 26 ++++++++++++++++++++++++++ testsuite/gna/issue917/testsuite.sh | 11 +++++++++++ 2 files changed, 37 insertions(+) create mode 100644 testsuite/gna/issue917/dut.vhdl create mode 100755 testsuite/gna/issue917/testsuite.sh (limited to 'testsuite') diff --git a/testsuite/gna/issue917/dut.vhdl b/testsuite/gna/issue917/dut.vhdl new file mode 100644 index 000000000..56d09cdca --- /dev/null +++ b/testsuite/gna/issue917/dut.vhdl @@ -0,0 +1,26 @@ +library ieee; +use ieee.std_logic_1164.all; +entity avmm_csr is + Generic (width : positive); + Port ( + reg_i : in std_ulogic_vector(width-1 downto 0) + ); +end avmm_csr; +architecture rtl of avmm_csr is +begin +end rtl; + +library ieee; +use ieee.std_logic_1164.all; +entity dut is +end entity dut; +architecture rtl of dut is + signal s : std_ulogic_vector(1 downto 0); +begin + inst : entity work.avmm_csr + generic map (width => 4) + port map ( + reg_i => "11"&s + ); +end architecture rtl; + diff --git a/testsuite/gna/issue917/testsuite.sh b/testsuite/gna/issue917/testsuite.sh new file mode 100755 index 000000000..0a831521f --- /dev/null +++ b/testsuite/gna/issue917/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +analyze dut.vhdl +elab_simulate dut + +clean + +echo "Test successful" -- cgit v1.2.3