From bf028b7f7406f538d6acf6edab8e8b2d367aa6c0 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 24 Jan 2017 08:51:38 +0100
Subject: Add testcase for #262

---
 testsuite/gna/issue262/repro.vhdl   | 16 ++++++++++++++++
 testsuite/gna/issue262/testsuite.sh | 11 +++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 testsuite/gna/issue262/repro.vhdl
 create mode 100755 testsuite/gna/issue262/testsuite.sh

(limited to 'testsuite')

diff --git a/testsuite/gna/issue262/repro.vhdl b/testsuite/gna/issue262/repro.vhdl
new file mode 100644
index 000000000..bb4dd2965
--- /dev/null
+++ b/testsuite/gna/issue262/repro.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity repro is
+end;
+
+architecture behav of repro is
+begin
+  process
+    variable result : std_ulogic;
+  begin
+    result := std_ulogic_vector'("-000") ?/= std_ulogic_vector'("0000");
+    result := std_ulogic_vector'("-000") ?= std_ulogic_vector'("0000");
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/gna/issue262/testsuite.sh b/testsuite/gna/issue262/testsuite.sh
new file mode 100755
index 000000000..15fea4385
--- /dev/null
+++ b/testsuite/gna/issue262/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro --assert-level=error
+
+clean
+
+echo "Test successful"
-- 
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