From 9d8c3f48d303ebdd9585a183ba46b736194bf0ab Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sun, 3 Nov 2019 06:33:03 +0100
Subject: testsuite/synth: add memmux04 test.

---
 testsuite/synth/memmux01/memmux04.vhdl    | 23 ++++++++++++++
 testsuite/synth/memmux01/tb_memmux04.vhdl | 51 +++++++++++++++++++++++++++++++
 testsuite/synth/memmux01/testsuite.sh     |  2 +-
 3 files changed, 75 insertions(+), 1 deletion(-)
 create mode 100644 testsuite/synth/memmux01/memmux04.vhdl
 create mode 100644 testsuite/synth/memmux01/tb_memmux04.vhdl

(limited to 'testsuite')

diff --git a/testsuite/synth/memmux01/memmux04.vhdl b/testsuite/synth/memmux01/memmux04.vhdl
new file mode 100644
index 000000000..04fed7d62
--- /dev/null
+++ b/testsuite/synth/memmux01/memmux04.vhdl
@@ -0,0 +1,23 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity memmux04 is
+  port (ad : std_logic_vector (1 downto 0);
+        val : std_logic;
+        dat : std_logic_vector (3 downto 0);
+        res : out std_logic_vector (3 downto 0));
+end memmux04;
+
+architecture behav of memmux04 is
+begin
+  process (ad, val)
+    variable hi, lo : natural;
+    variable t : std_logic_vector(3 downto 0);
+  begin
+    lo := to_integer(unsigned(ad));
+    t := dat;
+    t (lo) := val;
+    res <= t;
+  end process;
+end behav;
diff --git a/testsuite/synth/memmux01/tb_memmux04.vhdl b/testsuite/synth/memmux01/tb_memmux04.vhdl
new file mode 100644
index 000000000..e53fe6f56
--- /dev/null
+++ b/testsuite/synth/memmux01/tb_memmux04.vhdl
@@ -0,0 +1,51 @@
+entity tb_memmux04 is
+end tb_memmux04;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_memmux04 is
+  signal ad : std_logic_vector (1 downto 0);
+  signal val : std_logic;
+  signal dat, res : std_logic_vector (3 downto 0);
+begin
+  dut : entity work.memmux04
+    port map (
+      ad => ad,
+      val => val,
+      dat => dat,
+      res => res);
+
+  process
+  begin
+    dat <= x"e";
+    
+    ad <= "00";
+    val <= '0';
+    wait for 1 ns;
+    assert res = x"e" severity failure;
+
+    ad <= "01";
+    val <= '0';
+    wait for 1 ns;
+    assert res = x"c" severity failure;
+
+    ad <= "00";
+    val <= '1';
+    wait for 1 ns;
+    assert res = x"f" severity failure;
+
+    ad <= "10";
+    val <= '0';
+    wait for 1 ns;
+    assert res = x"a" severity failure;
+
+    ad <= "11";
+    val <= '0';
+    wait for 1 ns;
+    assert res = x"6" severity failure;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/memmux01/testsuite.sh b/testsuite/synth/memmux01/testsuite.sh
index a53d09350..024e51d2a 100755
--- a/testsuite/synth/memmux01/testsuite.sh
+++ b/testsuite/synth/memmux01/testsuite.sh
@@ -2,7 +2,7 @@
 
 . ../../testenv.sh
 
-for t in memmux01 memmux02 memmux03; do
+for t in memmux01 memmux02 memmux03 memmux04; do
     analyze $t.vhdl tb_$t.vhdl
     elab_simulate tb_$t
     clean
-- 
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