From 9d6e7f40d3c3c02b86325aa60c2cc5e9da18c9d7 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sun, 12 Sep 2021 16:21:47 +0200
Subject: testsuite/gna: add a test for #786

---
 testsuite/gna/issue786/ent.vhdl     | 15 +++++++++++++++
 testsuite/gna/issue786/testsuite.sh | 11 +++++++++++
 2 files changed, 26 insertions(+)
 create mode 100644 testsuite/gna/issue786/ent.vhdl
 create mode 100755 testsuite/gna/issue786/testsuite.sh

(limited to 'testsuite')

diff --git a/testsuite/gna/issue786/ent.vhdl b/testsuite/gna/issue786/ent.vhdl
new file mode 100644
index 000000000..833f4241e
--- /dev/null
+++ b/testsuite/gna/issue786/ent.vhdl
@@ -0,0 +1,15 @@
+entity ent is
+end ent;
+
+architecture a of ent is
+	signal sig_x : bit_vector(2 downto 0);
+	signal sig_y : bit_vector(2 downto 0);
+
+	signal sig_z : bit_vector(3 downto 0);
+begin
+	-- works
+--	(sig_x(1), sig_x(0), sig_y(1), sig_y(0)) <= sig_z;
+
+	-- "raised CONSTRAINT_ERROR : trans-chap3.adb:3058 access check failed"
+	(sig_x(1 downto 0), sig_y(1 downto 0)) <= sig_z;
+end a;
diff --git a/testsuite/gna/issue786/testsuite.sh b/testsuite/gna/issue786/testsuite.sh
new file mode 100755
index 000000000..bda8f5d14
--- /dev/null
+++ b/testsuite/gna/issue786/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze ent.vhdl
+elab_simulate ent
+
+clean
+
+echo "Test successful"
-- 
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