From 36f2516608cb5645c781a5b6fe6de41a85645532 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 4 Aug 2020 19:20:59 +0200
Subject: testsuite/gna: add a test for #1067

Close #1067
---
 testsuite/gna/issue1067/testsuite.sh | 20 ++++++++++++++++++++
 testsuite/gna/issue1067/top.vhdl     | 16 ++++++++++++++++
 2 files changed, 36 insertions(+)
 create mode 100755 testsuite/gna/issue1067/testsuite.sh
 create mode 100644 testsuite/gna/issue1067/top.vhdl

(limited to 'testsuite')

diff --git a/testsuite/gna/issue1067/testsuite.sh b/testsuite/gna/issue1067/testsuite.sh
new file mode 100755
index 000000000..edba5bba5
--- /dev/null
+++ b/testsuite/gna/issue1067/testsuite.sh
@@ -0,0 +1,20 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+
+for f in top; do
+  analyze $f.vhdl
+  elab $f
+
+  if ghdl_has_feature $f ghw; then
+    simulate $f --dump-rti
+    simulate $f --wave=$f.ghw
+    rm -f $f.ghw
+  fi
+done
+
+clean
+
+echo "Test successful"
diff --git a/testsuite/gna/issue1067/top.vhdl b/testsuite/gna/issue1067/top.vhdl
new file mode 100644
index 000000000..52df2196f
--- /dev/null
+++ b/testsuite/gna/issue1067/top.vhdl
@@ -0,0 +1,16 @@
+library ieee;                                             
+   use ieee.std_logic_1164.all;   
+   use ieee.numeric_std.all;      
+
+entity top is
+end entity ; 
+
+architecture arch_top of top is
+
+    type t_slv_array is array(natural range <>) of std_logic_vector;
+
+    signal test : t_slv_array(0 to 2)(7 downto 0);
+
+begin
+
+end architecture arch_top;
-- 
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