From 6c3f709174e8e4d5411f851cedb7d84c38d3b04a Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Fri, 20 Dec 2013 04:48:54 +0100
Subject: Import vests testsuite

---
 .../aggregates/simple-aggregate-lvalue.vhdl        |  19 +++
 .../aggregates/simple-integer-aggregate.vhdl       |  17 +++
 .../aliases/objects/simple-string-alias.vhdl       |  14 ++
 .../array/simple-ascending-attribute.vhdl          |  13 ++
 .../attributes/array/simple-high-attribute.vhdl    |  13 ++
 .../attributes/array/simple-left-attribute.vhdl    |  13 ++
 .../attributes/array/simple-length-attribute.vhdl  |  15 ++
 .../attributes/array/simple-low-attribute.vhdl     |  13 ++
 .../attributes/array/simple-right-attribute.vhdl   |  13 ++
 .../attributes/signal/simple-event-attribute.vhdl  |  22 +++
 .../attributes/signal/simple-last-value.vhdl       |  15 ++
 .../signal/simple-last_event-attribute.vhdl        |  21 +++
 .../signal/simple-last_value-attribute.vhdl        |  18 +++
 .../attributes/type/base/simple-integer-test.vhdl  |  13 ++
 .../attributes/type/left/simple-integer-test.vhdl  |  13 ++
 .../type/range/simple-range-attribute.vhdl         |  14 ++
 .../attributes/type/right/simple-integer-test.vhdl |  13 ++
 .../type/simple-integer-test-ascending.vhdl        |  13 ++
 .../attributes/type/simple-integer-test-high.vhdl  |  13 ++
 .../attributes/type/simple-integer-test-image.vhdl |  17 +++
 .../type/simple-integer-test-leftof.vhdl           |  15 ++
 .../attributes/type/simple-integer-test-low.vhdl   |  13 ++
 .../attributes/type/simple-integer-test-pred.vhdl  |  15 ++
 .../type/simple-integer-test-rightof.vhdl          |  15 ++
 .../attributes/type/simple-integer-test-succ.vhdl  |  15 ++
 .../attributes/type/simple-integer-test-val.vhdl   |  17 +++
 .../attributes/type/simple-integer-test-value.vhdl |  17 +++
 .../compliant/functional/components/.cvsignore     |   1 +
 .../components/integer-default-binding.vhdl        |  41 ++++++
 .../components/integer-with-config-spec.vhdl       |  46 +++++++
 .../components/integer-with-port-map.vhdl          |  47 +++++++
 .../components/simple-array-example.vhdl           |  47 +++++++
 .../components/unconstrained-array-example.vhdl    |  47 +++++++
 .../constants/simple-string-constant.vhdl          |  15 ++
 .../pass-array-type-through-inout-port.vhdl        |  15 ++
 .../entities/pass-integer-through-inout-port.vhdl  |  15 ++
 .../functions/integer-type-overload.vhdl           |  28 ++++
 .../functional/functions/simple-out-parameter.vhdl |  18 +++
 .../functions/simple-procedure-call.vhdl           |  16 +++
 .../functions/simple-resolution-function.vhd       |  38 ++++++
 .../functions/unconstrained_parameter.vhdl         |  18 +++
 .../generics/entity-generic-defines-port-type.vhdl |  40 ++++++
 .../functional/generics/simple-entity-generic.vhdl |  13 ++
 .../objects/constants/simple-string-constant.vhdl  |  15 ++
 .../signals/assignments/integer-fanout.vhdl        |  35 +++++
 .../signals/assignments/simple-integer-assign.vhdl |  23 ++++
 .../assignments/simple-integer-initialize.vhdl     |  13 ++
 ...nteger-variable-persist-across-activations.vhdl |  26 ++++
 .../variable/simple-enumeration-assign.vhdl        |  16 +++
 .../objects/variable/simple-integer-assign.vhdl    |  16 +++
 .../variable/simple-integer-initialize.vhdl        |  15 ++
 .../operators/addition/add-two-integers.vhdl       |  16 +++
 .../operators/addition/variable-plus-int.vhdl      |  16 +++
 .../operators/addition/variable-plus-variable.vhdl |  17 +++
 .../concatenate-string-character.vhdl              |  18 +++
 .../concatenation/concatenate-two-strings.vhdl     |  18 +++
 .../operators/division/integer-division.vhdl       |  16 +++
 .../packages/simple_package_body_test.vhdl         |  28 ++++
 .../functional/packages/simple_package_test.vhdl   |  20 +++
 .../signals/assign/simple-array-assign.vhdl        |  16 +++
 .../signals/assign/simple-integer-assign.vhdl      |  16 +++
 .../signals/assign/simple-integer-initialize.vhdl  |  13 ++
 .../functional/signals/assign/simple/.cvsignore    |   2 +
 .../compliant/functional/slices/simple-slice.vhdl  |  14 ++
 .../compliant/functional/slices/slice-lvalue.vhdl  |  15 ++
 .../block-statements/simple-grouping-block.vhdl    |  26 ++++
 .../dynamic_package_procedure_for_loop.vhdl        |  30 ++++
 .../for-loops/dynamic_procedure_for_loop.vhdl      |  22 +++
 .../enumeration-for-loop-constrained.vhdl          |  17 +++
 .../statements/for-loops/enumeration-for-loop.vhdl |  17 +++
 .../statements/for-loops/integer-for-loop.vhdl     |  16 +++
 .../if-statements/simple-if-statement.vhdl         |  37 +++++
 .../functional/std_logic_1164/test_and_table.vhdl  |  48 +++++++
 .../functional/std_logic_1164/test_or_table.vhdl   |  49 +++++++
 .../std_logic_1164/test_resolution_table.vhdl      |  47 +++++++
 .../test_std_logic_resolution_function.vhdl        |  24 ++++
 .../std_logic_1164/test_std_logic_type.vhdl        |  43 ++++++
 .../functional/std_logic_1164/test_xor_table.vhdl  |  49 +++++++
 .../functional/std_standard/simple-now-test.vhdl   |  15 ++
 .../subtypes/modified-character-subtype.vhdl       |  15 ++
 .../subtypes/modified-integer-subtype.vhdl         |  15 ++
 .../subtypes/simple-enumeration-subtype.vhdl       |  15 ++
 .../functional/textio/read/character_array_read.in |   1 +
 .../textio/read/character_array_read.vhdl          |  58 ++++++++
 .../functional/textio/read/character_read.in       |   4 +
 .../functional/textio/read/character_read.vhdl     |  58 ++++++++
 .../functional/textio/read/simple-read.in          |   4 +
 .../functional/textio/read/simple-read.vhdl        |  57 ++++++++
 .../textio/write/character_array_write.vhd         |  41 ++++++
 .../functional/textio/write/character_write.vhd    |  44 ++++++
 .../functional/textio/write/fopen_test_1.vhdl      |  57 ++++++++
 .../functional/textio/write/fopen_test_2.vhdl      |  63 +++++++++
 .../functional/textio/write/fopen_test_3.vhdl      |  63 +++++++++
 .../textio/write/integer_array_write.vhd           |  45 ++++++
 .../functional/textio/write/record_write.vhd       |  62 +++++++++
 .../functional/textio/write/string_array_write.vhd |  50 +++++++
 .../functional/textio/write/write_bit_vector.vhdl  |  43 ++++++
 .../array-types/character-index-constant.vhdl      |  15 ++
 .../types/array-types/colors_2d_array.vhdl         |  29 ++++
 .../integer-array-using-tick-range.vhdl            |  21 +++
 .../types/array-types/simple-integer-array.vhdl    |  22 +++
 .../types/array-types/subprogram-dynamic-type.vhdl |  20 +++
 .../types/array-types/unconstrained_argument.vhdl  |  21 +++
 .../types/enumeration-types/std-enums-test.vhdl    | 151 +++++++++++++++++++++
 .../types/integer-types/resolved-integer-type.vhdl |  44 ++++++
 .../integer-types/subprogram-dynamic-type.vhdl     |  26 ++++
 .../functional/types/record-types/date-record.vhdl |  25 ++++
 .../integer-record-aggregate-init.vhdl             |  21 +++
 .../types/record-types/simple-integer-record.vhdl  |  22 +++
 .../functional/types/simple-subtypes.vhdl          |  41 ++++++
 ...nteger-variable-persist-across-activations.vhdl |  28 ++++
 .../variable/simple-enumeration-assign.vhdl        |  16 +++
 .../functional/variable/simple-integer-assign.vhdl |  16 +++
 .../variable/simple-integer-initialize.vhdl        |  15 ++
 114 files changed, 2906 insertions(+)
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-aggregate-lvalue.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-integer-aggregate.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aliases/objects/simple-string-alias.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-ascending-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-high-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-left-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-length-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-low-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-right-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-event-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last-value.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_event-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_value-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/base/simple-integer-test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/left/simple-integer-test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/range/simple-range-attribute.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/right/simple-integer-test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-ascending.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-high.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-image.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-leftof.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-low.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-pred.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-rightof.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-succ.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-val.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-value.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/.cvsignore
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-default-binding.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-config-spec.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-port-map.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/simple-array-example.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/unconstrained-array-example.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/constants/simple-string-constant.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-array-type-through-inout-port.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-integer-through-inout-port.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/entity-generic-defines-port-type.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/simple-entity-generic.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/constants/simple-string-constant.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/integer-fanout.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-initialize.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/integer-variable-persist-across-activations.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-enumeration-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-initialize.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/add-two-integers.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-int.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-variable.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-string-character.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-two-strings.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/division/integer-division.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_body_test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-array-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-initialize.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple/.cvsignore
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/simple-slice.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/slice-lvalue.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_standard/simple-now-test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-character-subtype.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-integer-subtype.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/simple-enumeration-subtype.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.in
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.in
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.in
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_array_write.vhd
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_write.vhd
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_1.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_2.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_3.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/integer_array_write.vhd
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/record_write.vhd
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/string_array_write.vhd
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/write_bit_vector.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/character-index-constant.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/colors_2d_array.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/integer-array-using-tick-range.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/simple-integer-array.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/subprogram-dynamic-type.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/unconstrained_argument.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/enumeration-types/std-enums-test.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/resolved-integer-type.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/subprogram-dynamic-type.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/date-record.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/integer-record-aggregate-init.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/simple-integer-record.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/simple-subtypes.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/integer-variable-persist-across-activations.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-enumeration-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-assign.vhdl
 create mode 100644 testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-initialize.vhdl

(limited to 'testsuite/vests/vhdl-93/clifton-labs/compliant/functional')

diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-aggregate-lvalue.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-aggregate-lvalue.vhdl
new file mode 100644
index 000000000..2f338a297
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-aggregate-lvalue.vhdl
@@ -0,0 +1,19 @@
+entity test is
+end test;
+
+architecture only of test is
+  type int_array is array (3 downto 0) of integer;
+begin  -- only
+  p: process
+    variable w, x, y, z : integer := 0;
+    variable q : int_array := (3, 2, 1, 0);
+  begin  -- process p
+    (w, x, y, z) := q;
+    assert w = 3 report "TEST FAILED" severity FAILURE;
+    assert x = 2 report "TEST FAILED" severity FAILURE;
+    assert y = 1 report "TEST FAILED" severity FAILURE;
+    assert z = 0 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-integer-aggregate.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-integer-aggregate.vhdl
new file mode 100644
index 000000000..a98cbbc4e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aggregates/simple-integer-aggregate.vhdl
@@ -0,0 +1,17 @@
+entity test is
+end test;
+
+architecture only of test is
+  type integer_array is array (0 to 2) of integer;
+begin  -- only
+  p: process
+    variable x : integer_array;
+  begin  -- process p
+    x := (0, 1, 2);
+    assert x(0) = 0 report "TEST FAILED - 0" severity FAILURE;
+    assert x(1) = 1 report "TEST FAILED - 1" severity FAILURE;  
+    assert x(2) = 2 report "TEST FAILED - 2" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aliases/objects/simple-string-alias.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aliases/objects/simple-string-alias.vhdl
new file mode 100644
index 000000000..372f3156b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/aliases/objects/simple-string-alias.vhdl
@@ -0,0 +1,14 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  only: process
+    variable string_variable : string(1 to 5) := "Hello";
+    alias string_alias : string(1 to 5) is string_variable;
+  begin  -- process
+    assert string_alias = "Hello" report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-ascending-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-ascending-attribute.vhdl
new file mode 100644
index 000000000..d1df1c860
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-ascending-attribute.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type my_type is array(0 to 3) of integer;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert (my_type'ascending) report "TEST FAILED ascending" severity failure;
+    report "TEST PASSED ascending";
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-high-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-high-attribute.vhdl
new file mode 100644
index 000000000..18f508be5
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-high-attribute.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type my_type is array(0 to 3) of integer;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert my_type'high = 3 report "TEST FAILED high = 3" severity failure;
+    report "TEST PASSED high = 3";
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-left-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-left-attribute.vhdl
new file mode 100644
index 000000000..9c7f3b0ea
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-left-attribute.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type my_type is array(0 to 3) of integer;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert my_type'left = 0 report "TEST FAILED left = 0" severity failure;
+    report "TEST PASSED left = 0";
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-length-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-length-attribute.vhdl
new file mode 100644
index 000000000..add2c6c88
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-length-attribute.vhdl
@@ -0,0 +1,15 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : string(1 to 4) := "1234";
+  begin  -- process
+    assert x'length = 4 report "TEST FAILED - x'length does not equal 4" severity failure;
+    assert x'length /= 4 report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-low-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-low-attribute.vhdl
new file mode 100644
index 000000000..bbec01327
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-low-attribute.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type my_type is array(0 to 3) of integer;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert my_type'low = 0 report "TEST FAILED low = 0" severity failure;
+    report "TEST PASSED low = 0";
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-right-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-right-attribute.vhdl
new file mode 100644
index 000000000..d73f0829a
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/array/simple-right-attribute.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type my_type is array(0 to 3) of integer;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert my_type'right = 3 report "TEST FAILED right = 3" severity failure;
+    report "TEST PASSED right = 3";
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-event-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-event-attribute.vhdl
new file mode 100644
index 000000000..e3c5d30cb
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-event-attribute.vhdl
@@ -0,0 +1,22 @@
+entity test is
+end test;
+
+architecture only of test is
+  signal s : bit;
+begin
+  s  <= '1' after 10 ns, '0' after 20 ns, '1' after 30 ns, '0' after 40 ns;
+  p: process
+  begin
+    wait for 1 ns;
+    assert not(s'event) report "TEST FAILED - 'event active" severity failure;
+   wait for 25 ns;
+ --   s <= '1';
+--    wait for 0 ns;
+    assert s = '0' report "TEST FAILED - s has not changed  to 0 yet!" severity failure;
+     wait for 10 ns;
+    assert s = '1' report "TEST FAILED - s has not changed  to 1 yet!" severity failure;
+    assert (s'event) report "TEST FAILED - 'event not tripped" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process;
+end architecture only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last-value.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last-value.vhdl
new file mode 100644
index 000000000..a2e0133b4
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last-value.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+  signal s : bit := '0';
+begin
+  p : process
+  begin
+    s <= '1';
+    wait for 0 fs;
+    assert s'last_value = '0' report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_event-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_event-attribute.vhdl
new file mode 100644
index 000000000..dfe1f2224
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_event-attribute.vhdl
@@ -0,0 +1,21 @@
+entity test is
+end test;
+
+architecture only of test is
+  signal s : bit;
+begin
+  s  <= '1' after 5 ns, '0' after 20 ns, '1' after 30 ns, '0' after 40 ns;
+  p: process
+   variable v: time;
+  begin
+   wait for 15 ns;
+    v:=s'last_event;
+    assert v = 10 ns report "TEST FAILED - s previous value incorrect!" severity failure;
+    report "TEST PASSED elapsed time is 10 ns" ;
+   wait for 14 ns;
+    v:=s'last_event;
+    assert v = 9 ns report "TEST FAILED - s previous value incorrect!" severity failure;
+    report "TEST PASSED elapsed time is 9 ns" ;
+    wait;
+  end process;
+end architecture only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_value-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_value-attribute.vhdl
new file mode 100644
index 000000000..eafaf406b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/signal/simple-last_value-attribute.vhdl
@@ -0,0 +1,18 @@
+entity test is
+end test;
+
+architecture only of test is
+  signal s : bit;
+begin
+  s  <= '1' after 10 ns, '0' after 20 ns, '1' after 30 ns, '0' after 40 ns;
+  p: process
+   variable v: bit;
+  begin
+    wait for 1 ns;
+   wait for 25 ns;
+    v:=s'last_value;
+    assert v = '1' report "TEST FAILED - s previous value incorrect!" severity failure;
+    report "TEST PASSED v = 1" ;
+    wait;
+  end process;
+end architecture only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/base/simple-integer-test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/base/simple-integer-test.vhdl
new file mode 100644
index 000000000..a47da0b32
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/base/simple-integer-test.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  subtype small is integer range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+ assert small'base'left = integer'left report "TEST FAILED" severity FAILURE;
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/left/simple-integer-test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/left/simple-integer-test.vhdl
new file mode 100644
index 000000000..34b52d6c6
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/left/simple-integer-test.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'left = 1 report "TEST FAILED" severity FAILURE;
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/range/simple-range-attribute.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/range/simple-range-attribute.vhdl
new file mode 100644
index 000000000..b3692a5da
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/range/simple-range-attribute.vhdl
@@ -0,0 +1,14 @@
+entity test is
+end test;
+
+architecture only of test is
+  type my_type is array(0 to 3) of integer;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert my_type'range'left = 0 report "TEST FAILED" severity failure;
+    assert my_type'range'right = 3 report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/right/simple-integer-test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/right/simple-integer-test.vhdl
new file mode 100644
index 000000000..4ebe8a171
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/right/simple-integer-test.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'right = 3 report "TEST FAILED" severity FAILURE;
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-ascending.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-ascending.vhdl
new file mode 100644
index 000000000..d5dc98297
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-ascending.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert (small'ascending)  report "TEST FAILED ascending" severity FAILURE;
+  report "TEST PASSED ascending" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-high.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-high.vhdl
new file mode 100644
index 000000000..86f478a99
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-high.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'high = 3 report "TEST FAILED T high" severity FAILURE;
+  report "TEST PASSED T high" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-image.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-image.vhdl
new file mode 100644
index 000000000..0b62a3e11
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-image.vhdl
@@ -0,0 +1,17 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'image(1) = "1" report "TEST FAILED image 1" severity FAILURE;
+  report "TEST PASSED image 1" severity NOTE;
+  assert small'image(2) = "2" report "TEST FAILED image 2" severity FAILURE;
+  report "TEST PASSED image 2" severity NOTE;
+  assert small'image(3) = "3" report "TEST FAILED image 3" severity FAILURE;
+  report "TEST PASSED image 3" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-leftof.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-leftof.vhdl
new file mode 100644
index 000000000..b82884a13
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-leftof.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'leftof(2) = 1  report "TEST FAILED. leftof 2 = 1" severity FAILURE;
+  report "TEST PASSED leftof 2 = 1" severity NOTE;
+  assert small'leftof(3) = 2  report "TEST FAILED. leftof 3 = 2" severity FAILURE;
+  report "TEST PASSED leftof 3 = 2" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-low.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-low.vhdl
new file mode 100644
index 000000000..849996334
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-low.vhdl
@@ -0,0 +1,13 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'low = 1 report "TEST FAILED T low" severity FAILURE;
+  report "TEST PASSED T low" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-pred.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-pred.vhdl
new file mode 100644
index 000000000..03aebd7c3
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-pred.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'pred(2) = 1  report "TEST FAILED. pred 2 = 1" severity FAILURE;
+  report "TEST PASSED pred 2 = 1" severity NOTE;
+  assert small'pred(3) = 2  report "TEST FAILED. pred 3 = 2" severity FAILURE;
+  report "TEST PASSED pred 3 = 2" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-rightof.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-rightof.vhdl
new file mode 100644
index 000000000..de11c66c1
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-rightof.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'rightof(1) = 2  report "TEST FAILED. rightof 1 = 2" severity FAILURE;
+  report "TEST PASSED rightof 1 = 2" severity NOTE;
+  assert small'rightof(2) = 3  report "TEST FAILED. rightof 2 = 3" severity FAILURE;
+  report "TEST PASSED rightof 2 = 3" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-succ.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-succ.vhdl
new file mode 100644
index 000000000..3f27b004d
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-succ.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'succ(1) = 2  report "TEST FAILED. succ 1 = 2" severity FAILURE;
+  report "TEST PASSED succ 1 = 2" severity NOTE;
+  assert small'succ(2) = 3  report "TEST FAILED. succ 2 = 3" severity FAILURE;
+  report "TEST PASSED succ 2 = 3" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-val.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-val.vhdl
new file mode 100644
index 000000000..db5064bbc
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-val.vhdl
@@ -0,0 +1,17 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'val(1) = 1 report "TEST FAILED val pos 1" severity FAILURE;
+  report "TEST PASSED val pos 1" severity NOTE;
+  assert small'val(2) = 2 report "TEST FAILED val pos 2" severity FAILURE;
+  report "TEST PASSED val pos 2" severity NOTE;
+  assert small'val(3) = 3 report "TEST FAILED val pos 3" severity FAILURE;
+  report "TEST PASSED val pos 3" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-value.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-value.vhdl
new file mode 100644
index 000000000..97b6cd247
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/attributes/type/simple-integer-test-value.vhdl
@@ -0,0 +1,17 @@
+entity test is
+end test;
+
+architecture only of test is
+  type small is range 1 to 3;
+begin  -- only
+p: process
+begin  -- process p
+  assert small'value("1") = 1 report "TEST FAILED value 1" severity FAILURE;
+  report "TEST PASSED value 1" severity NOTE;
+  assert small'value("2") = 2 report "TEST FAILED value 2" severity FAILURE;
+  report "TEST PASSED value 2" severity NOTE;
+  assert small'value("3") = 3 report "TEST FAILED value 3" severity FAILURE;
+  report "TEST PASSED value 3" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/.cvsignore b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/.cvsignore
new file mode 100644
index 000000000..681ae245e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/.cvsignore
@@ -0,0 +1 @@
+work._savant_lib
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-default-binding.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-default-binding.vhdl
new file mode 100644
index 000000000..d162a1117
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-default-binding.vhdl
@@ -0,0 +1,41 @@
+entity forty_two is
+  port (
+    int_out : out integer);
+end forty_two;
+
+architecture only of forty_two is
+begin  -- only
+  process
+  begin  -- process
+    int_out <= 42;
+    wait;
+  end process;
+end only;
+
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+
+  component forty_two
+    port (
+      int_out : out integer);
+  end component;
+  
+  signal int_signal : integer;
+
+begin  -- only
+
+  ft0 : component forty_two
+    port map (
+      int_out => int_signal );
+
+  test: process
+  begin  -- process test
+    wait for 1 ms;
+    assert int_signal = 42 report "TEST FAILED" severity ERROR;
+    assert not(int_signal = 42) report "TEST PASSED" severity NOTE;
+    wait;
+  end process test;
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-config-spec.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-config-spec.vhdl
new file mode 100644
index 000000000..c43c3e259
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-config-spec.vhdl
@@ -0,0 +1,46 @@
+entity forty_two is
+  port (
+    int_out : out integer);
+end forty_two;
+
+architecture only of forty_two is
+begin  -- only
+  process
+  begin  -- process
+    int_out <= 42;
+    wait;
+  end process;
+end only;
+
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+
+  component forty_two
+    port (
+      int_out : out integer);
+  end component;
+
+  for ft0 : forty_two
+    use entity work.forty_two(only)
+      port map ( int_out => int_out );
+  
+  signal int_signal : integer;
+
+begin  -- only
+
+  ft0 : component forty_two
+    port map (
+      int_out => int_signal );
+
+
+  test: process
+  begin  -- process test
+    wait for 1 ms;
+    assert int_signal = 42 report "TEST FAILED" severity ERROR;
+    assert not(int_signal = 42) report "TEST PASSED" severity NOTE;
+    wait;
+  end process test;
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-port-map.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-port-map.vhdl
new file mode 100644
index 000000000..60695f92e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/integer-with-port-map.vhdl
@@ -0,0 +1,47 @@
+entity forty_two is
+  port (
+    int_out : out integer);
+end forty_two;
+
+architecture only of forty_two is
+begin  -- only
+  process
+  begin  -- process
+    int_out <= 42;
+    wait;
+  end process;
+end only;
+
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+
+  component forty_two_component
+    port (
+      c_int_out : out integer);
+  end component;
+
+  for ft0 : forty_two_component
+    use entity work.forty_two(only)
+      port map (
+        int_out => c_int_out);
+  
+  signal int_signal : integer;
+
+begin  -- only
+
+  ft0 : component forty_two_component
+    port map (
+      c_int_out => int_signal );
+
+
+  test: process
+  begin  -- process test
+    wait for 1 ms;
+    assert int_signal = 42 report "TEST FAILED" severity ERROR;
+    assert not(int_signal = 42) report "TEST PASSED" severity NOTE;
+    wait;
+  end process test;
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/simple-array-example.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/simple-array-example.vhdl
new file mode 100644
index 000000000..aa08f64f6
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/simple-array-example.vhdl
@@ -0,0 +1,47 @@
+entity forty_two is
+  port (
+    bv4_out : out bit_vector( 3 downto 0 ));
+end forty_two;
+
+architecture only of forty_two is
+begin  -- only
+  process
+  begin  -- process
+    bv4_out <= "0110";
+    wait;
+  end process;
+end only;
+
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+
+  component forty_two_component
+    port (
+      c_bv4_out : out bit_vector( 3 downto 0 ));
+  end component;
+
+  for ft0 : forty_two_component
+    use entity work.forty_two(only)
+      port map (
+        bv4_out => c_bv4_out );
+  
+  signal bv4_signal : bit_vector( 3 downto 0 );
+
+begin  -- only
+
+  ft0 : component forty_two_component
+    port map (
+      c_bv4_out => bv4_signal );
+
+
+  test: process
+  begin  -- process test
+    wait for 1 ms;
+    assert bv4_signal = "0110" report "TEST FAILED" severity ERROR;
+    assert not(bv4_signal = "0110") report "TEST PASSED" severity NOTE;
+    wait;
+  end process test;
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/unconstrained-array-example.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/unconstrained-array-example.vhdl
new file mode 100644
index 000000000..1a021e3fd
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/components/unconstrained-array-example.vhdl
@@ -0,0 +1,47 @@
+entity forty_two is
+  port (
+    bv_out : out bit_vector );
+end forty_two;
+
+architecture only of forty_two is
+begin  -- only
+  process
+  begin  -- process
+    bv_out <= "0110";
+    wait;
+  end process;
+end only;
+
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+
+  component forty_two_component
+    port (
+      c_bv_out : out bit_vector );
+  end component;
+
+  for ft0 : forty_two_component
+    use entity work.forty_two(only)
+      port map (
+        bv_out => c_bv_out );
+  
+  signal bv_signal : bit_vector( 3 downto 0 );
+
+begin  -- only
+
+  ft0 : component forty_two_component
+    port map (
+      c_bv_out => bv_signal );
+
+
+  test: process
+  begin  -- process test
+    wait for 1 ms;
+    assert bv_signal = "0110" report "TEST FAILED" severity ERROR;
+    assert not(bv_signal = "0110") report "TEST PASSED" severity NOTE;
+    wait;
+  end process test;
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/constants/simple-string-constant.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/constants/simple-string-constant.vhdl
new file mode 100644
index 000000000..88b3d135b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/constants/simple-string-constant.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    constant string_constant : string := "init";
+  begin  -- process
+    assert string_constant(1) = 'i' REPORT "string_constant(1) not properly intialized" SEVERITY FAILURE;
+    assert string_constant(2) = 'n' REPORT "string_constant(2) not properly intialized" SEVERITY FAILURE;
+    assert string_constant(3) = 'i' REPORT "string_constant(3) not properly intialized" SEVERITY FAILURE;
+    assert string_constant(4) = 't' REPORT "string_constant(4) not properly intialized" SEVERITY FAILURE;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-array-type-through-inout-port.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-array-type-through-inout-port.vhdl
new file mode 100644
index 000000000..819c59223
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-array-type-through-inout-port.vhdl
@@ -0,0 +1,15 @@
+entity test_output is
+  port (
+    output : inout bit_vector( 1 downto 0 ) := "10"
+    );
+end test_output;
+
+architecture only of test_output is
+begin  -- test_output
+  test: process
+  begin  -- process test
+    assert output = "10" report "test failed" severity error;
+    assert output /= "10" report "test passed" severity note;
+    wait;
+  end process test;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-integer-through-inout-port.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-integer-through-inout-port.vhdl
new file mode 100644
index 000000000..294dddae0
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/entities/pass-integer-through-inout-port.vhdl
@@ -0,0 +1,15 @@
+entity test_output is
+  port (
+    output : inout integer := 10
+    );
+end test_output;
+
+architecture only of test_output is
+begin  -- test_output
+  test: process
+  begin  -- process test
+    assert output = 10 report "test failed" severity error;
+    assert output /= 10 report "test passed" severity note;
+    wait;
+  end process test;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl
new file mode 100644
index 000000000..3809b2df5
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl
@@ -0,0 +1,28 @@
+entity test is
+end test;
+
+architecture only of test is
+  type integer_t1 is range 0 to 2;
+  type integer_t2 is range 2 to 4;
+  function test_function ( constant param : integer_t1 )
+    return boolean is
+  begin
+    return true;
+  end function;
+  
+  function test_function ( constant param : integer_t2 )
+    return boolean is
+  begin
+    return true;
+  end function;
+begin  -- only
+  test: process
+    variable result : boolean;
+    variable param1 : integer_t1 := 3;
+    variable param2 : integer_t2 := 5;
+  begin  -- process
+    result := test_function( param1 );
+    result := test_function( param2 );
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl
new file mode 100644
index 000000000..7131e4513
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl
@@ -0,0 +1,18 @@
+entity test is
+end test;
+
+architecture only of test is
+  procedure out_param ( one : out integer ) is
+  begin
+    one := 1;
+  end out_param;
+begin  -- only
+  doit: process
+    variable one : integer := 0;
+  begin  -- process doit
+    out_param( one );
+    assert one = 1 report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl
new file mode 100644
index 000000000..16068cdf7
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl
@@ -0,0 +1,16 @@
+entity test is
+end test;
+
+architecture only of test is
+  procedure doit is
+  begin
+    report "PROCEDURE CALLED!";
+  end procedure;
+begin  -- only
+  process
+  begin  -- process doit
+    doit;
+    report "TEST PASSED";
+    wait;    
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd
new file mode 100644
index 000000000..249b1dc25
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd
@@ -0,0 +1,38 @@
+entity test is
+end test;
+
+architecture only of test is
+  -- forward declaration of the function.
+  function wired_or( s : bit_vector ) return bit;
+  -- declare the subtype.
+  subtype rbit is wired_or bit;
+
+  -- declare the actual function.
+  function wired_or( s : bit_vector ) return bit is
+  begin
+      report "resolution function called!" severity note;
+    if  ( (s(0) = '1') or (s(1) = '1')) then
+      return '1';
+    end if;
+    return '0';
+  end wired_or;
+
+  -- declare a signal of that type.  a resolved signal.
+  signal s : rbit;
+
+begin
+
+  -- a concurrent signal assignment.  driver # 1.
+  s <= '1';
+
+  testing: process
+  begin
+    -- verify that resolution function getting called.
+    s <= '1' after 10 ns;
+    wait on s;
+    assert ( s = '1' ) report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process testing;
+
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl
new file mode 100644
index 000000000..38a9f9a9b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl
@@ -0,0 +1,18 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- onlty
+  doit: process
+    function returns_last( p : bit_vector )
+      return bit is
+    begin
+      return p( p'length - 1 );
+    end function;
+  begin  -- process doit
+    assert returns_last( "00" ) = '0' report "TEST FAILED" severity failure;
+    assert returns_last( "11" ) = '1' report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/entity-generic-defines-port-type.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/entity-generic-defines-port-type.vhdl
new file mode 100644
index 000000000..297cbd35b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/entity-generic-defines-port-type.vhdl
@@ -0,0 +1,40 @@
+entity test_bench is
+end test_bench;
+
+entity generic_defines_port_type is
+  generic( width : natural );
+  port( input : in bit_vector( width - 1 downto 0 );
+        finished : in boolean );
+end entity;
+
+architecture only of generic_defines_port_type is
+
+begin  -- only
+  p: process( finished )
+  begin  -- process p
+    if finished = true then
+      for i in input'range loop
+        assert input(i) = '1' report "TEST FAILED" severity FAILURE;
+      end loop;  -- i
+    end if;
+  end process p;
+end only;
+
+architecture only of test_bench is
+  signal gdpt1_input : bit_vector( 3 downto 0 ) := "0000";
+  signal gdpt1_finished : boolean := false;
+begin  -- only
+  gdpt1: entity generic_defines_port_type
+    generic map ( width => 4 )
+    port    map ( input => gdpt1_input, finished => gdpt1_finished );
+
+  doit: process
+  begin  -- process doit
+    gdpt1_input <= "1111";
+    wait for 1 fs;
+    gdpt1_finished <= true;
+    wait for 1 fs;
+    report "TEST PASSED";
+  end process doit;
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/simple-entity-generic.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/simple-entity-generic.vhdl
new file mode 100644
index 000000000..707646c1b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/generics/simple-entity-generic.vhdl
@@ -0,0 +1,13 @@
+entity test is
+  generic ( int_generic : integer := 10);
+end test;
+
+architecture only of test is
+begin  -- only
+  p: process
+  begin  -- process p
+    assert int_generic = 10 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/constants/simple-string-constant.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/constants/simple-string-constant.vhdl
new file mode 100644
index 000000000..88b3d135b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/constants/simple-string-constant.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    constant string_constant : string := "init";
+  begin  -- process
+    assert string_constant(1) = 'i' REPORT "string_constant(1) not properly intialized" SEVERITY FAILURE;
+    assert string_constant(2) = 'n' REPORT "string_constant(2) not properly intialized" SEVERITY FAILURE;
+    assert string_constant(3) = 'i' REPORT "string_constant(3) not properly intialized" SEVERITY FAILURE;
+    assert string_constant(4) = 't' REPORT "string_constant(4) not properly intialized" SEVERITY FAILURE;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/integer-fanout.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/integer-fanout.vhdl
new file mode 100644
index 000000000..1e479aa8f
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/integer-fanout.vhdl
@@ -0,0 +1,35 @@
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+  signal sig : integer := 0;
+begin  -- only
+  assign: process
+  begin  -- process p
+    sig <= 1;
+    wait;
+  end process assign;
+
+  check1: process
+  begin  -- process check1
+    wait for 1 fs;
+    assert sig = 1 report "TEST FAILED" severity FAILURE;
+    wait;
+  end process check1;
+
+  check2: process
+  begin  -- process check1
+    wait for 1 fs;
+    assert sig = 1 report "TEST FAILED" severity FAILURE;
+    wait;
+  end process check2;
+
+  check3: process
+  begin  -- process check1
+    wait for 2 fs;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process check3;
+
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-assign.vhdl
new file mode 100644
index 000000000..3efa37b6e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-assign.vhdl
@@ -0,0 +1,23 @@
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+  signal sig : integer := 0;
+begin  -- only
+  p: process
+  begin  -- process p
+    sig <= 1;
+    wait for 1 fs;
+    assert sig = 1 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+
+  r: process (sig)
+  begin  -- process r
+    if sig'event then
+      report "Event on sig, new value = " & integer'image( sig );
+    end if;
+  end process r;
+    
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-initialize.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-initialize.vhdl
new file mode 100644
index 000000000..91e45ebc9
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/signals/assignments/simple-integer-initialize.vhdl
@@ -0,0 +1,13 @@
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+  signal sig : integer := 0;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert sig = 0 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/integer-variable-persist-across-activations.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/integer-variable-persist-across-activations.vhdl
new file mode 100644
index 000000000..1f7e65fd4
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/integer-variable-persist-across-activations.vhdl
@@ -0,0 +1,26 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+  signal clock : bit;
+begin  -- only
+  process (clock)
+    variable x : integer := 0;
+    variable l : line;
+  begin  -- process
+    write( l, string'( "x = " ) );
+    write( l, x );
+    writeline( output, l );
+    x := x + 1;
+  end process;
+
+  process
+  begin  -- process
+    clock <= '1' after 1 ns,
+             '0' after 2 ns,
+             '1' after 3 ns;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-enumeration-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-enumeration-assign.vhdl
new file mode 100644
index 000000000..e324a398e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-enumeration-assign.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : boolean := false;
+  begin  -- process
+    x := true;
+    assert x = true report "TEST FAILED - x does not equal true" severity failure;
+    assert x /= true report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-assign.vhdl
new file mode 100644
index 000000000..265cadbce
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-assign.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 0;
+  begin  -- process
+    x := 1;
+    assert x = 1 report "TEST FAILED - x does not equal 1" severity failure;
+    assert x /= 1 report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-initialize.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-initialize.vhdl
new file mode 100644
index 000000000..fc2ded3b5
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/objects/variable/simple-integer-initialize.vhdl
@@ -0,0 +1,15 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 0;
+  begin  -- process
+    assert x = 0 report "TEST FAILED - x does not equal 1" severity failure;
+    report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/add-two-integers.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/add-two-integers.vhdl
new file mode 100644
index 000000000..0d3c3a44c
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/add-two-integers.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 0;
+  begin  -- process
+    x := 1 + 2;
+    assert x = 3 report "TEST FAILED - x does not equal 1" severity failure;
+    assert x /= 3 report "TEST PASSED" severity NOTE;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-int.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-int.vhdl
new file mode 100644
index 000000000..18943e78c
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-int.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 1;
+  begin  -- process
+    x := x + 2;
+    assert x = 3 report "TEST FAILED - x does not equal 1" severity failure;
+    assert x /= 3 report "TEST PASSED" severity NOTE;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-variable.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-variable.vhdl
new file mode 100644
index 000000000..cf19b322e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/addition/variable-plus-variable.vhdl
@@ -0,0 +1,17 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 1;
+    variable y : integer := 2;
+  begin  -- process
+    x := x + y;
+    assert x = 3 report "TEST FAILED - x does not equal 1" severity failure;
+    assert x /= 3 report "TEST PASSED" severity NOTE;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-string-character.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-string-character.vhdl
new file mode 100644
index 000000000..c626d1ec7
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-string-character.vhdl
@@ -0,0 +1,18 @@
+entity test is
+end test;
+
+architecture only of test is
+
+begin  -- only
+
+  doit: process
+    variable concatted : string(1 to 4);
+  begin  -- process doit
+    concatted := "foo" & 'l';
+
+    assert concatted = "fool" report "TEST FAILED - concatted was not 'fool'" severity failure;
+    assert not(concatted = "fool") report "TEST PASSED" severity note;
+    
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-two-strings.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-two-strings.vhdl
new file mode 100644
index 000000000..aab8f63a3
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/concatenation/concatenate-two-strings.vhdl
@@ -0,0 +1,18 @@
+entity test is
+end test;
+
+architecture only of test is
+
+begin  -- only
+
+  doit: process
+    variable concatted : string(1 to 6);
+  begin  -- process doit
+    concatted := "foo" & "bar";
+
+    assert concatted = "foobar" report "TEST FAILED - concatted was not 'foobar'" severity failure;
+    assert not(concatted = "foobar") report "TEST PASSED" severity note;
+    
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/division/integer-division.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/division/integer-division.vhdl
new file mode 100644
index 000000000..3124df89b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/operators/division/integer-division.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 0;
+  begin  -- process
+    x := 4/2;
+    assert x = 2 report "TEST FAILED - x does not equal 2" severity failure;
+    assert x /= 2 report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_body_test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_body_test.vhdl
new file mode 100644
index 000000000..205cb359a
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_body_test.vhdl
@@ -0,0 +1,28 @@
+package test_pkg is
+  function return_one
+    return integer;
+end test_pkg;
+
+package body test_pkg is
+  function return_one
+    return integer is
+  begin  -- return_one
+    return 1;
+  end return_one;
+end test_pkg;
+
+
+use work.test_pkg.all;
+
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  p: process
+  begin  -- process p
+    assert ( return_one = 1 ) report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_test.vhdl
new file mode 100644
index 000000000..c7f0f2efa
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/packages/simple_package_test.vhdl
@@ -0,0 +1,20 @@
+package test_pkg is
+  type small_int is range -5 to 5;
+end test_pkg;
+
+use work.test_pkg.all;
+
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  p: process
+    variable x : small_int;
+  begin  -- process p
+    x := 3;
+    assert ( x = 3 ) report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-array-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-array-assign.vhdl
new file mode 100644
index 000000000..d3809c57d
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-array-assign.vhdl
@@ -0,0 +1,16 @@
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+  signal sig : bit_vector( 3 downto 0 );
+begin  -- only
+  p: process
+  begin  -- process p
+    sig <= "1001";
+    wait for 1 fs;
+    assert sig = "1001" report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+    
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-assign.vhdl
new file mode 100644
index 000000000..c233fdf4b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-assign.vhdl
@@ -0,0 +1,16 @@
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+  signal sig : integer := 0;
+begin  -- only
+  p: process
+  begin  -- process p
+    sig <= 1;
+    wait for 1 fs;
+    assert sig = 1 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+    
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-initialize.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-initialize.vhdl
new file mode 100644
index 000000000..91e45ebc9
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple-integer-initialize.vhdl
@@ -0,0 +1,13 @@
+entity test_bench is
+end test_bench;
+
+architecture only of test_bench is
+  signal sig : integer := 0;
+begin  -- only
+  p: process
+  begin  -- process p
+    assert sig = 0 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple/.cvsignore b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple/.cvsignore
new file mode 100644
index 000000000..19eb705c9
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/signals/assign/simple/.cvsignore
@@ -0,0 +1,2 @@
+work._savant_lib
+work.sym
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/simple-slice.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/simple-slice.vhdl
new file mode 100644
index 000000000..626fc791d
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/simple-slice.vhdl
@@ -0,0 +1,14 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    constant string_constant : string := "foobar";
+  begin  -- process
+    assert string_constant( 1 to 3 ) = "foo" report "TEST FAILED" severity FAILURE;
+    assert string_constant( 4 to 6 ) = "bar" report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/slice-lvalue.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/slice-lvalue.vhdl
new file mode 100644
index 000000000..3c5f75043
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/slices/slice-lvalue.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    variable string_var : string( 1 to 6 );
+  begin  -- process
+    string_var( 1 to 3 ) := "foo";
+    string_var( 4 to 6 ) := "bar";
+    assert string_var = "foobar" report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl
new file mode 100644
index 000000000..c10bd2211
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl
@@ -0,0 +1,26 @@
+entity test is
+end test;
+
+architecture only of test is
+  signal delay_line_in : bit := '0';
+  signal delay_line_out : bit := '0';
+begin  -- only
+  delay: block
+  begin  -- block delay
+    delay_line_out <= delay_line_in after 1 ns;
+  end block delay;
+
+  start: process
+  begin  -- process
+    delay_line_in <= '1';
+    wait;
+  end process;
+
+  check: process( delay_line_out )
+  begin
+    if delay_line_out = '1' then
+      assert now = 1 ns report "TEST FAILED - delay did not happen as expected!" severity FAILURE;
+      assert not(now = 1 ns) report "TEST PASSED" severity FAILURE;
+    end if;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl
new file mode 100644
index 000000000..48d810f63
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl
@@ -0,0 +1,30 @@
+package pkg is
+  procedure iterate (
+    input : in bit_vector);
+end pkg;
+
+package body pkg is
+  procedure iterate (
+    input : in bit_vector) is
+    variable j : integer := input'range'left;
+  begin  -- iterate
+    for i in input'range loop
+      assert i = j report "TEST FAILED" severity failure;
+      j := j + 1;
+    end loop;  -- i in 1 to 10
+    assert j = input'range'right + 1 report "TEST FAILED" severity failure;
+  end iterate;
+end pkg;
+
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+  begin  -- process doit
+    work.pkg.iterate("0000");
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl
new file mode 100644
index 000000000..0ce8edae3
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl
@@ -0,0 +1,22 @@
+entity test is
+end test;
+
+architecture only of test is
+  procedure iterate (
+    input : in bit_vector) is
+    variable j : integer := input'range'left;
+  begin  -- iterate
+    for i in input'range loop
+      assert i = j report "TEST FAILED" severity failure;
+      j := j + 1;
+    end loop;  -- i in 1 to 10
+    assert j = input'range'right + 1 report "TEST FAILED" severity failure;
+  end iterate;
+begin  -- only
+  doit: process
+  begin  -- process doit
+    iterate("0000");
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl
new file mode 100644
index 000000000..647642e3b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl
@@ -0,0 +1,17 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  type color is ( red, blue, green );
+  variable x : color;
+begin  -- process p
+  for i in red to blue loop
+    x := i;
+  end loop;  -- i
+  assert x = blue report "TEST FAILED x was " & color'image(x) severity ERROR;
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl
new file mode 100644
index 000000000..2330e1823
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl
@@ -0,0 +1,17 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  type color is ( red, blue, green );
+  variable x : color;
+begin  -- process p
+  for i in red to green loop
+    x := i;
+  end loop;  -- i
+  assert x = green report "TEST FAILED x was " & color'image(x) severity ERROR;
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl
new file mode 100644
index 000000000..1a7db2f6a
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl
@@ -0,0 +1,16 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  variable x : integer;
+begin  -- process p
+  for i in 1 to 10 loop
+    x := i;
+  end loop;  -- i
+  assert x = 10 report "TEST FAILED x was " & integer'image(x) severity ERROR;
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl
new file mode 100644
index 000000000..d84b85f7e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl
@@ -0,0 +1,37 @@
+entity test is
+end test;
+
+architecture only of test is
+
+begin  -- only
+  doit: process
+    variable one, two, three : boolean := false;
+  begin  -- process doit
+    if true then
+      one := true;
+    else
+      
+    end if;
+    
+    if false then
+      one := false;
+    else
+      two := true;
+    end if;
+
+    if false then
+      one := false;
+    elsif true then
+      three := true;
+    else
+      two := false;
+    end if;
+    
+    assert one report "TEST FAILED - first if test failed" severity failure;
+    assert two report "TEST FAILED - second if test failed" severity failure;
+    assert three report "TEST FAILED - third if test failed" severity failure;
+    report "TEST PASSED" severity note;
+    
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl
new file mode 100644
index 000000000..ba58cb6ca
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl
@@ -0,0 +1,48 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+    CONSTANT and_table : stdlogic_table := (
+    --      ----------------------------------------------------
+    --      |  U    X    0    1    Z    W    L    H    -         |   |
+    --      ----------------------------------------------------
+            ( 'U', 'U', '0', 'U', 'U', 'U', '0', 'U', 'U' ),  -- | U |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' ),  -- | X |
+            ( '0', '0', '0', '0', '0', '0', '0', '0', '0' ),  -- | 0 |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | 1 |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' ),  -- | Z |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' ),  -- | W |
+            ( '0', '0', '0', '0', '0', '0', '0', '0', '0' ),  -- | L |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | H |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' )   -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert and_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert and_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert and_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert and_table( '0', '1' ) = '0' report "TEST FAILED-0x1";
+    assert and_table( 'H', 'Z' ) = 'X' report "TEST FAILED-HxZ";
+    assert and_table( 'Z', 'W' ) = 'X' report "TEST FAILED-ZxW";
+    assert and_table( 'L', '1' ) = '0' report "TEST FAILED-Lx1";
+    assert and_table( 'H', '1' ) = '1' report "TEST FAILED-Hx1";
+    assert and_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert and_table( 'Z', 'L' ) = '0' report "TEST FAILED-ZxL";
+    assert and_table( 'Z', 'H' ) = 'X' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl
new file mode 100644
index 000000000..4a2f18650
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl
@@ -0,0 +1,49 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+    -- truth table for "or" function
+    CONSTANT or_table : stdlogic_table := (
+    --      ----------------------------------------------------
+    --      |  U    X    0    1    Z    W    L    H    -         |   |
+    --      ----------------------------------------------------
+            ( 'U', 'U', 'U', '1', 'U', 'U', 'U', '1', 'U' ),  -- | U |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ),  -- | X |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | 0 |
+            ( '1', '1', '1', '1', '1', '1', '1', '1', '1' ),  -- | 1 |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ),  -- | Z |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ),  -- | W |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | L |
+            ( '1', '1', '1', '1', '1', '1', '1', '1', '1' ),  -- | H |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' )   -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert or_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert or_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert or_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert or_table( '0', '1' ) = '1' report "TEST FAILED-0x1";
+    assert or_table( 'H', 'Z' ) = '1' report "TEST FAILED-HxZ";
+    assert or_table( 'Z', 'W' ) = 'X' report "TEST FAILED-ZxW";
+    assert or_table( 'L', '1' ) = '1' report "TEST FAILED-Lx1";
+    assert or_table( 'H', '1' ) = '1' report "TEST FAILED-Hx1";
+    assert or_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert or_table( 'Z', 'L' ) = 'X' report "TEST FAILED-ZxL";
+    assert or_table( 'Z', 'H' ) = '1' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl
new file mode 100644
index 000000000..a87396720
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl
@@ -0,0 +1,47 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+  CONSTANT resolution_table : stdlogic_table := (
+--  ---------------------------------------------------------
+--  |  U    X    0    1    Z    W    L    H    -        |   |
+--  ---------------------------------------------------------
+    ( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ), -- | U |
+    ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | X |
+    ( 'U', 'X', '0', 'X', '0', '0', '0', '0', 'X' ), -- | 0 |
+    ( 'U', 'X', 'X', '1', '1', '1', '1', '1', 'X' ), -- | 1 |
+    ( 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', 'X' ), -- | Z |
+    ( 'U', 'X', '0', '1', 'W', 'W', 'W', 'W', 'X' ), -- | W |
+    ( 'U', 'X', '0', '1', 'L', 'W', 'L', 'W', 'X' ), -- | L |
+    ( 'U', 'X', '0', '1', 'H', 'W', 'W', 'H', 'X' ), -- | H |
+    ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' )  -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert resolution_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert resolution_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert resolution_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert resolution_table( '0', '1' ) = 'X' report "TEST FAILED-0x1";
+    assert resolution_table( 'H', 'Z' ) = 'H' report "TEST FAILED-HxZ";
+    assert resolution_table( 'Z', 'W' ) = 'W' report "TEST FAILED-ZxW";
+    assert resolution_table( 'L', '1' ) = '1' report "TEST FAILED-Lx1";
+    assert resolution_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert resolution_table( 'Z', 'L' ) = 'L' report "TEST FAILED-ZxL";
+    assert resolution_table( 'Z', 'H' ) = 'H' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl
new file mode 100644
index 000000000..97bc98508
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl
@@ -0,0 +1,24 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+  signal x, y, result : std_logic := '1';
+begin  -- only
+  result <= x;
+  result <= y;
+
+  process
+  begin  -- process
+    assert x = '1' report "TEST FAILED" severity failure;
+    assert y = '1' report "TEST FAILED" severity failure;
+    assert result = '1' report "TEST FAILED" severity failure;
+
+    report "TEST PASSED";
+--    x <= 'U';
+--    y <= 'U';
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl
new file mode 100644
index 000000000..a63346315
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl
@@ -0,0 +1,43 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+    variable x : std_logic;
+  begin  -- process
+    assert std_logic'pos('U') = 0 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('X') = 1 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('0') = 2 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('1') = 3 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('Z') = 4 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('W') = 5 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('L') = 6 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('H') = 7 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('-') = 8 report "TEST FAILED" severity FAILURE;
+
+    assert x'left = 'U' report "TEST FAILED" severity FAILURE;
+    assert x'right = '-' report "TEST FAILED" severity FAILURE;
+    assert x'high = '-' report "TEST FAILED" severity FAILURE;
+    assert x'low = 'U' report "TEST FAILED" severity FAILURE;
+    assert x'ascending = true report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'image('U') = "'U'" report "TEST FAILED" severity FAILURE;
+    assert std_logic'value("'U'") = 'U' report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'val(0) = 'U' report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'succ('U') = 'X' report "TEST FAILED" severity FAILURE;
+    assert std_logic'pred('-') = 'H' report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'leftof('-') = 'H' report "TEST FAILED" severity FAILURE;
+    assert std_logic'rightof('U') = 'X' report "TEST FAILED" severity FAILURE;
+    
+    report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl
new file mode 100644
index 000000000..32e55cd6d
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl
@@ -0,0 +1,49 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+    -- truth table for "xor" function
+    CONSTANT xor_table : stdlogic_table := (
+    --      ----------------------------------------------------
+    --      |  U    X    0    1    Z    W    L    H    -         |   |
+    --      ----------------------------------------------------
+            ( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ),  -- | U |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  -- | X |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | 0 |
+            ( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ),  -- | 1 |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  -- | Z |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  -- | W |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | L |
+            ( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ),  -- | H |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' )   -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert xor_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert xor_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert xor_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert xor_table( '0', '1' ) = '1' report "TEST FAILED-0x1";
+    assert xor_table( 'H', 'Z' ) = 'X' report "TEST FAILED-HxZ";
+    assert xor_table( 'Z', 'W' ) = 'X' report "TEST FAILED-ZxW";
+    assert xor_table( 'L', '1' ) = '1' report "TEST FAILED-Lx1";
+    assert xor_table( 'H', '1' ) = '0' report "TEST FAILED-Hx1";
+    assert xor_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert xor_table( 'Z', 'L' ) = 'X' report "TEST FAILED-ZxL";
+    assert xor_table( 'Z', 'H' ) = 'X' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_standard/simple-now-test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_standard/simple-now-test.vhdl
new file mode 100644
index 000000000..9b6db14f3
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_standard/simple-now-test.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  p: process
+  begin  -- process p
+    wait for 1 ns;
+    assert now = 1 ns report "TEST FAILED" severity FAILURE;
+    wait for 10 ns;
+    assert now = 11 ns report "TEST FAILED" severity FAILURE;
+    report "PASSED TEST" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-character-subtype.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-character-subtype.vhdl
new file mode 100644
index 000000000..c64b80b12
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-character-subtype.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    subtype sub_character is character range 'A' to 'Z';
+    constant x : sub_character;
+  begin
+    assert x = sub_character'left report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process;   
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-integer-subtype.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-integer-subtype.vhdl
new file mode 100644
index 000000000..4cb4e7c04
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/modified-integer-subtype.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    subtype sub_integer is integer range 42 to 69;
+    constant x : sub_integer;
+  begin
+    assert x = sub_integer'left report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process;   
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/simple-enumeration-subtype.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/simple-enumeration-subtype.vhdl
new file mode 100644
index 000000000..746665879
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/subtypes/simple-enumeration-subtype.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+    subtype sub_boolean is boolean range false to true;
+    constant x : sub_boolean;
+  begin
+    assert x = sub_boolean'left report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process;   
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.in b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.in
new file mode 100644
index 000000000..6292c4526
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.in
@@ -0,0 +1 @@
+'1', 'A', '$', '+'
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.vhdl
new file mode 100644
index 000000000..1358d4091
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_array_read.vhdl
@@ -0,0 +1,58 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity character_array_read is
+end character_array_read;
+
+architecture test0 of character_array_read is
+  type character_array      is array (natural range <>) of character;
+  type character_array_file is file of character_array;
+  signal    k : integer := 0;
+begin
+  doit: process
+    file filein    : character_array_file open read_mode is "character_array_read.in";
+    variable  v    : character_array(0 to 3);
+    variable  len   : natural;
+  begin
+    assert(endfile(filein) = false)
+      report "End of file reached before expected."
+      severity failure;
+
+    read(filein,v,len);
+
+    assert(len = 4)
+      report "FAILED TEST: character_array_read.  Wrong length."
+      severity failure;
+
+    assert (v = ('1','a','$','+'))
+      report "FAILED TEST: character_array_read.  Incorrect characters read."
+      severity failure;
+
+    assert(endfile(filein))
+      severity failure;
+
+    report "PASSED TEST: character_array_read."
+      severity note;
+    wait;
+  end process;
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.in b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.in
new file mode 100644
index 000000000..f3727af8f
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.in
@@ -0,0 +1,4 @@
+'1'
+'A'
+'$'
+'+'
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.vhdl
new file mode 100644
index 000000000..7acb1351b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/character_read.vhdl
@@ -0,0 +1,58 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity character_read is
+end character_read;
+
+architecture test0 of character_read is
+  type character_file is file of character;
+  signal k : integer := 0;
+begin
+  doit: process
+    file filein : character_file open read_mode is "character_read.in";
+    variable  v : character;
+  begin
+    assert(endfile(filein) = false)
+      report "End of file reached before expected."
+      severity failure;
+
+    read(filein,v); 
+
+    assert(v = '1') severity failure;
+
+    read(filein,v); 
+    assert(v = 'A') severity failure;
+
+    read(filein,v); 
+    assert(v = '$') severity failure;
+
+    read(filein,v); 
+    assert(v = '+') severity failure;
+
+    assert(endfile(filein));
+
+    report "PASSED TEST: character_read."
+      severity NOTE;
+    wait;
+  end process;
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.in b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.in
new file mode 100644
index 000000000..94ebaf900
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.in
@@ -0,0 +1,4 @@
+1
+2
+3
+4
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.vhdl
new file mode 100644
index 000000000..0ce29687a
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/read/simple-read.vhdl
@@ -0,0 +1,57 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity simple_read is
+end simple_read;
+
+use std.textio.all;
+
+architecture only of simple_read is
+  type integer_file is file of integer;
+begin  -- only
+  doit: process
+    file infile : integer_file open read_mode is "simple-read.in";
+    variable v : integer;
+  begin  -- process
+
+    assert( not(endfile( infile )) );
+
+    read( infile, v );
+    assert( v = 1 );
+
+    read( infile, v );
+    assert( v = 2 );
+
+    read( infile, v );
+    assert( v = 3 );
+
+    read( infile, v );
+    assert( v = 4 );
+
+    assert( endfile( infile ) );
+
+    report "PASSED"
+      severity NOTE;
+    
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_array_write.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_array_write.vhd
new file mode 100644
index 000000000..1774062ea
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_array_write.vhd
@@ -0,0 +1,41 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity character_array_write is
+end character_array_write;
+
+architecture test0 of character_array_write is
+  type character_array  is array (natural range <>) of character;
+  type character_array_file is file of character_array;
+begin
+  doit: process
+    file fileout : character_array_file open write_mode is "character_array_write.out";
+  begin
+    write(fileout,('1','a','$','+'));
+
+    assert false
+      report "PASSED TEST: character_array_write."
+      severity note;
+    wait;
+  end process;
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_write.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_write.vhd
new file mode 100644
index 000000000..fab261a2c
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/character_write.vhd
@@ -0,0 +1,44 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity character_write is
+end character_write;
+
+architecture test0 of character_write is
+  type character_file is file of character;
+begin
+  doit: process
+    file fileout : character_file open write_mode is "character_write.out";
+  begin
+    write(fileout, '1');
+    write(fileout, 'a');
+    write(fileout, '$');
+    write(fileout, '+');
+
+    assert false
+      report "PASSED TEST: character_write."
+      severity note;
+    wait;
+  end process;
+
+end test0;
+
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_1.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_1.vhdl
new file mode 100644
index 000000000..c06ac1a84
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_1.vhdl
@@ -0,0 +1,57 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity fopen_test_3 is
+end fopen_test_3;
+
+architecture test0 of fopen_test_3 is
+
+  constant StringLength: integer := 16;
+  constant NumOfStrings: integer := 5;
+  
+  subtype str16 is string (1 to StringLength);
+  type string_table is array (1 to NumOfStrings) of str16;
+
+  constant string_array: string_table :=
+    ( "This is string 1"
+      ,"__Hello  World__"
+      ,"This is string " & "3"
+      ,"_Bird is a word_"
+      ,"_Goodbye (ciao)_"
+      );
+
+  type ft is file of string;
+
+begin
+  doit: process
+    file file_desc : ft;
+  begin
+    file_open(file_desc, "fopen_test_1.out", write_mode);
+    for i in NumOfStrings downto 1 loop
+      write(file_desc, string_array(i));
+    end loop;
+    file_close(file_desc);
+
+    wait;
+  end process; 
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_2.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_2.vhdl
new file mode 100644
index 000000000..2ef6a13f9
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_2.vhdl
@@ -0,0 +1,63 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity fopen_test_3 is
+end fopen_test_3;
+
+architecture test0 of fopen_test_3 is
+
+  constant StringLength: integer := 16;
+  constant NumOfStrings: integer := 5;
+  
+  subtype str16 is string (1 to StringLength);
+  type string_table is array (1 to NumOfStrings) of str16;
+
+  constant string_array: string_table :=
+    ( "This is string 1"
+      ,"__Hello  World__"
+      ,"This is string " & "3"
+      ,"_Bird is a word_"
+      ,"_Goodbye (ciao)_"
+      );
+
+  type ft is file of string;
+
+begin
+  doit: process
+    file file_desc : ft;
+  begin
+    file_open(file_desc, "fopen_test_2.out", write_mode);
+    for i in NumOfStrings downto 1 loop
+      write(file_desc, string_array(i));
+    end loop;
+    file_close(file_desc);
+
+    file_open(file_desc, "fopen_test_2.out", append_mode);
+    for i in 1 to NumOfStrings loop
+      write(file_desc, string_array(i));
+    end loop;
+    file_close(file_desc);
+
+    wait;
+  end process; 
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_3.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_3.vhdl
new file mode 100644
index 000000000..dfcd46f4e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/fopen_test_3.vhdl
@@ -0,0 +1,63 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity fopen_test_3 is
+end fopen_test_3;
+
+architecture test0 of fopen_test_3 is
+
+  constant StringLength: integer := 16;
+  constant NumOfStrings: integer := 5;
+  
+  subtype str16 is string (1 to StringLength);
+  type string_table is array (1 to NumOfStrings) of str16;
+
+  constant string_array: string_table :=
+    ( "This is string 1"
+      ,"__Hello  World__"
+      ,"This is string " & "3"
+      ,"_Bird is a word_"
+      ,"_Goodbye (ciao)_"
+      );
+
+  type ft is file of string;
+
+begin
+  doit: process
+    file file_desc : ft;
+  begin
+    file_open(file_desc, "fopen_test_3.out", write_mode);
+    for i in NumOfStrings downto 1 loop
+      write(file_desc, string_array(i));
+    end loop;
+    file_close(file_desc);
+
+    file_open(file_desc, "fopen_test_3.out", write_mode);
+    for i in 1 to NumOfStrings loop
+      write(file_desc, string_array(i));
+    end loop;
+    file_close(file_desc);
+
+    wait;
+  end process; 
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/integer_array_write.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/integer_array_write.vhd
new file mode 100644
index 000000000..37cbfe798
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/integer_array_write.vhd
@@ -0,0 +1,45 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity integer_array_write is
+end integer_array_write;
+
+architecture test0 of integer_array_write is
+
+  type integer_array_type is array (0 to 9) of integer;
+
+  constant integer_array : integer_array_type := (0, 1, 2, 3, 4, 5, 6, 7, 8, 9);
+  type integer_array_file is file of integer_array_type;
+
+begin
+  doit: process
+    file fileout : integer_array_file open write_mode is "integer_array_write.out";
+  begin
+    write(fileout, integer_array);
+
+    assert false
+      report "PASSED TEST: integer_array_write."
+      severity note;
+    wait;
+  end process;
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/record_write.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/record_write.vhd
new file mode 100644
index 000000000..4b053638f
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/record_write.vhd
@@ -0,0 +1,62 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity record_write is
+end record_write;
+
+architecture test0 of record_write is
+
+  type record_structure is record
+    a_boolean : boolean;
+    a_bit : bit;
+    a_character : character;
+    a_severity : severity_level;
+    a_string : string(0 to 10);
+    a_integer : integer;
+    a_real : real;
+  end record;
+
+  constant test_record : record_structure :=
+    ( false,
+      '1',
+      'T',
+      note,
+      "Hello World",
+      45,
+      10.5
+      );
+
+  type record_file is file of record_structure;
+
+begin
+  doit: process
+    file fileout : record_file open write_mode is "record_write.out";
+  begin
+    write(fileout,test_record);
+
+    assert false
+      report "PASSED TEST: record_write."
+      severity note;
+    wait;
+  end process;
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/string_array_write.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/string_array_write.vhd
new file mode 100644
index 000000000..f6ffd7f32
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/string_array_write.vhd
@@ -0,0 +1,50 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity string_array_write is
+end string_array_write;
+
+architecture test0 of string_array_write is
+  subtype str16 is string (1 to 16);
+  type string_table is array (natural range <>) of str16;
+  constant string_array : string_table :=
+    ( "This is string 1"
+      ,"__Hello  World__"
+      ,"This is string 3"
+      ,"_Bird is a word_"
+      ,"_Goodbye (ciao)_"
+      );
+
+  type string_array_file is file of string_table;
+begin
+  doit: process
+    file fileout : string_array_file open write_mode is "string_array_write.out";
+  begin
+    write(fileout,string_array);
+
+    assert false
+      report "PASSED TEST: string_array_write."
+      severity note;
+    wait;
+  end process;
+
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/write_bit_vector.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/write_bit_vector.vhdl
new file mode 100644
index 000000000..016579547
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/write_bit_vector.vhdl
@@ -0,0 +1,43 @@
+
+-- Copyright (C) Clifton Labs.  All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT.  CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity write_bit_vector_test is
+end write_bit_vector_test;
+
+use std.textio.all;
+
+architecture test0 of write_bit_vector_test is
+
+begin 
+  doit: process
+    variable outline : line;
+  begin  
+    write( outline, bit_vector'("1010") );
+    writeline( output, outline );
+
+    report "PASSED TEST: write_bit_vector."
+      severity NOTE;
+
+    wait;
+  end process;
+  
+end test0;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/character-index-constant.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/character-index-constant.vhdl
new file mode 100644
index 000000000..6c031dd8f
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/character-index-constant.vhdl
@@ -0,0 +1,15 @@
+entity test is
+end test;
+
+architecture only of test is
+  type     int_array_char_index_unconstrained is array (character range <>) of integer;
+  subtype  int_array_char_index_constrained   is int_array_char_index_unconstrained('0' to '9');
+  CONSTANT my_constant : int_array_char_index_constrained := ( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 );
+begin  -- only
+  p: process
+  begin  -- process p
+    assert my_constant('0') = 0 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+  wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/colors_2d_array.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/colors_2d_array.vhdl
new file mode 100644
index 000000000..c3da438e1
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/colors_2d_array.vhdl
@@ -0,0 +1,29 @@
+entity test is
+end test;
+
+architecture only of test is
+  type colors is ( 'R', 'O', 'Y', 'G', 'B', 'I', 'V', 'X' );
+  type color_table_t is array ( 1 to 3, 1 to 3 ) of colors;
+  CONSTANT primary_table : color_table_t := (
+    -- 'R' 'B' 'Y'
+    ( 'R', 'V', 'O' ),  -- 'R'
+    ( 'V', 'B', 'G' ),  -- 'B'
+    ( 'O', 'G', 'Y' )   -- 'Y'
+  );
+begin  -- only
+  test: process
+  begin  -- process test
+    assert primary_table( 1, 1 ) = 'R' report "TEST FAILED" severity failure;
+    assert primary_table( 1, 2 ) = 'V' report "TEST FAILED" severity failure;
+    assert primary_table( 1, 3 ) = 'O' report "TEST FAILED" severity failure;
+    assert primary_table( 2, 1 ) = 'V' report "TEST FAILED" severity failure;
+    assert primary_table( 2, 2 ) = 'B' report "TEST FAILED" severity failure;
+    assert primary_table( 2, 3 ) = 'G' report "TEST FAILED" severity failure;
+    assert primary_table( 3, 1 ) = 'O' report "TEST FAILED" severity failure;
+    assert primary_table( 3, 2 ) = 'G' report "TEST FAILED" severity failure;
+    assert primary_table( 3, 3 ) = 'Y' report "TEST FAILED" severity failure;
+
+    report "TEST PASSED";
+    wait;
+  end process test;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/integer-array-using-tick-range.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/integer-array-using-tick-range.vhdl
new file mode 100644
index 000000000..1e8b0abe5
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/integer-array-using-tick-range.vhdl
@@ -0,0 +1,21 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  type integerArray is array (0 to 9) of integer;
+  variable myArray : integerArray;
+begin  -- process p
+  for i in myArray'range loop
+    myArray(i) := i;
+  end loop;  -- i
+  for i in myArray'range loop
+    assert myArray(i) = i report "TEST FAILED myArray(i) = " &
+      integer'image(myArray(i)) & " - was supposed to be " &
+      integer'image(i) severity FAILURE;
+  end loop;  -- i
+  report "TEST PASSED" severity NOTE;
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/simple-integer-array.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/simple-integer-array.vhdl
new file mode 100644
index 000000000..f5bc596e4
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/simple-integer-array.vhdl
@@ -0,0 +1,22 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  type integerArray is array (0 to 2) of integer;
+  variable myArray : integerArray;
+begin  -- process p
+  myArray(0) := 0;
+  myArray(1) := 1;    
+  myArray(2) := 2;
+
+  assert myArray(0) = 0 report "TEST FAILED" severity FAILURE;
+  assert myArray(1) = 1 report "TEST FAILED" severity FAILURE;
+  assert myArray(2) = 2 report "TEST FAILED" severity FAILURE;
+
+  report "TEST PASSED" severity NOTE;
+  
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/subprogram-dynamic-type.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/subprogram-dynamic-type.vhdl
new file mode 100644
index 000000000..a2f537174
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/subprogram-dynamic-type.vhdl
@@ -0,0 +1,20 @@
+entity test is
+end test;
+
+architecture only of test is
+  procedure proc (
+    constant a : in bit_vector;
+    constant l : in integer ) is
+    type dyn is range a'left downto 0;
+  begin
+    assert dyn'left = l report "TEST FAILED" severity FAILURE;
+  end proc;
+begin  -- only
+  doit: process
+  begin  -- process doit
+    proc( "0000", 3 );
+    proc( "00000", 4 );
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/unconstrained_argument.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/unconstrained_argument.vhdl
new file mode 100644
index 000000000..d530af926
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/array-types/unconstrained_argument.vhdl
@@ -0,0 +1,21 @@
+entity test is
+end test;
+
+architecture only of test is
+  function get_left (
+    constant input_array : bit_vector)
+    return bit is
+  begin
+    return input_array(input_array'left);
+  end get_left;
+begin  -- only
+  process
+    constant argument1 : bit_vector( 0 to 3 ) := "0000";    
+    constant argument2 : bit_vector( 0 to 4 ) := "11111";
+  begin  -- process
+    assert get_left( argument1 ) = '0' report "TEST FAILED" severity failure;
+    assert get_left( argument2 ) = '1' report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/enumeration-types/std-enums-test.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/enumeration-types/std-enums-test.vhdl
new file mode 100644
index 000000000..9350a98d3
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/enumeration-types/std-enums-test.vhdl
@@ -0,0 +1,151 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+  doit: process
+  begin  -- process
+    assert( character'pos(NUL) = 0 ) report "TEST FAILED" severity failure;
+    assert ( character'pos(SOH) = 1)  report "TEST FAILED" severity failure;
+    assert ( character'pos(STX) = 2)  report "TEST FAILED" severity failure;
+    assert ( character'pos(ETX) = 3)  report "TEST FAILED" severity failure;
+    assert ( character'pos(EOT) = 4)  report "TEST FAILED" severity failure;
+    assert ( character'pos(ENQ) = 5)  report "TEST FAILED" severity failure;
+    assert ( character'pos(ACK) = 6)  report "TEST FAILED" severity failure;
+    assert ( character'pos(BEL) = 7)  report "TEST FAILED" severity failure;
+    assert ( character'pos(BS ) = 8)  report "TEST FAILED" severity failure;
+    assert ( character'pos(HT ) = 9)  report "TEST FAILED" severity failure;
+    assert ( character'pos(LF ) = 10)  report "TEST FAILED" severity failure;
+    assert ( character'pos(VT ) = 11)  report "TEST FAILED" severity failure;
+    assert ( character'pos(FF ) = 12)  report "TEST FAILED" severity failure;
+    assert ( character'pos(CR ) = 13)  report "TEST FAILED" severity failure;
+    assert ( character'pos(SO ) = 14)  report "TEST FAILED" severity failure;
+    assert ( character'pos(SI ) = 15)  report "TEST FAILED" severity failure;
+    assert ( character'pos(DLE) = 16)  report "TEST FAILED" severity failure;
+    assert ( character'pos(DC1) = 17)  report "TEST FAILED" severity failure;
+    assert ( character'pos(DC2) = 18)  report "TEST FAILED" severity failure;
+    assert ( character'pos(DC3) = 19)  report "TEST FAILED" severity failure;
+    assert ( character'pos(DC4) = 20)  report "TEST FAILED" severity failure;
+    assert ( character'pos(NAK) = 21)  report "TEST FAILED" severity failure;
+    assert ( character'pos(SYN) = 22)  report "TEST FAILED" severity failure;
+    assert ( character'pos(ETB) = 23)  report "TEST FAILED" severity failure;
+    assert ( character'pos(CAN) = 24)  report "TEST FAILED" severity failure;
+    assert ( character'pos(EM ) = 25)  report "TEST FAILED" severity failure;
+    assert ( character'pos(SUB) = 26)  report "TEST FAILED" severity failure;
+    assert ( character'pos(ESC) = 27)  report "TEST FAILED" severity failure;
+    assert ( character'pos(FSP) = 28)  report "TEST FAILED" severity failure;
+    assert ( character'pos(GSP) = 29)  report "TEST FAILED" severity failure;
+    assert ( character'pos(RSP) = 30)  report "TEST FAILED" severity failure;
+    assert ( character'pos(USP) = 31)  report "TEST FAILED" severity failure;
+    assert ( character'pos(' ') = 32)  report "TEST FAILED" severity failure;
+    assert ( character'pos('!') = 33)  report "TEST FAILED" severity failure;
+    assert ( character'pos('"') = 34)  report "TEST FAILED" severity failure;
+    assert ( character'pos('#') = 35)  report "TEST FAILED" severity failure;
+    assert ( character'pos('$') = 36)  report "TEST FAILED" severity failure;
+    assert ( character'pos('%') = 37)  report "TEST FAILED" severity failure;
+    assert ( character'pos('&') = 38)  report "TEST FAILED" severity failure;
+    assert ( character'pos(''') = 39)  report "TEST FAILED" severity failure;
+    assert ( character'pos('(') = 40)  report "TEST FAILED" severity failure;
+    assert ( character'pos(')') = 41)  report "TEST FAILED" severity failure;
+    assert ( character'pos('*') = 42)  report "TEST FAILED" severity failure;
+    assert ( character'pos('+') = 43)  report "TEST FAILED" severity failure;
+    assert ( character'pos(',') = 44)  report "TEST FAILED" severity failure;
+    assert ( character'pos('-') = 45)  report "TEST FAILED" severity failure;
+    assert ( character'pos('.') = 46)  report "TEST FAILED" severity failure;
+    assert ( character'pos('/') = 47)  report "TEST FAILED" severity failure;
+    assert ( character'pos('0') = 48)  report "TEST FAILED" severity failure;
+    assert ( character'pos('1') = 49)  report "TEST FAILED" severity failure;
+    assert ( character'pos('2') = 50)  report "TEST FAILED" severity failure;
+    assert ( character'pos('3') = 51)  report "TEST FAILED" severity failure;
+    assert ( character'pos('4') = 52)  report "TEST FAILED" severity failure;
+    assert ( character'pos('5') = 53)  report "TEST FAILED" severity failure;
+    assert ( character'pos('6') = 54)  report "TEST FAILED" severity failure;
+    assert ( character'pos('7') = 55)  report "TEST FAILED" severity failure;
+    assert ( character'pos('8') = 56)  report "TEST FAILED" severity failure;
+    assert ( character'pos('9') = 57)  report "TEST FAILED" severity failure;
+    assert ( character'pos(':') = 58)  report "TEST FAILED" severity failure;
+    assert ( character'pos(';') = 59)  report "TEST FAILED" severity failure;
+    assert ( character'pos('<') = 60)  report "TEST FAILED" severity failure;
+    assert ( character'pos('=') = 61)  report "TEST FAILED" severity failure;
+    assert ( character'pos('>') = 62)  report "TEST FAILED" severity failure;
+    assert ( character'pos('?') = 63)  report "TEST FAILED" severity failure;
+    assert ( character'pos('@') = 64)  report "TEST FAILED" severity failure;
+    assert ( character'pos('A') = 65)  report "TEST FAILED" severity failure;
+    assert ( character'pos('B') = 66)  report "TEST FAILED" severity failure;
+    assert ( character'pos('C') = 67)  report "TEST FAILED" severity failure;
+    assert ( character'pos('D') = 68)  report "TEST FAILED" severity failure;
+    assert ( character'pos('E') = 69)  report "TEST FAILED" severity failure;
+    assert ( character'pos('F') = 70)  report "TEST FAILED" severity failure;
+    assert ( character'pos('G') = 71)  report "TEST FAILED" severity failure;
+    assert ( character'pos('H') = 72)  report "TEST FAILED" severity failure;
+    assert ( character'pos('I') = 73)  report "TEST FAILED" severity failure;
+    assert ( character'pos('J') = 74)  report "TEST FAILED" severity failure;
+    assert ( character'pos('K') = 75)  report "TEST FAILED" severity failure;
+    assert ( character'pos('L') = 76)  report "TEST FAILED" severity failure;
+    assert ( character'pos('M') = 77)  report "TEST FAILED" severity failure;
+    assert ( character'pos('N') = 78)  report "TEST FAILED" severity failure;
+    assert ( character'pos('O') = 79)  report "TEST FAILED" severity failure;
+    assert ( character'pos('P') = 80)  report "TEST FAILED" severity failure;
+    assert ( character'pos('Q') = 81)  report "TEST FAILED" severity failure;
+    assert ( character'pos('R') = 82)  report "TEST FAILED" severity failure;
+    assert ( character'pos('S') = 83)  report "TEST FAILED" severity failure;
+    assert ( character'pos('T') = 84)  report "TEST FAILED" severity failure;
+    assert ( character'pos('U') = 85)  report "TEST FAILED" severity failure;
+    assert ( character'pos('V') = 86)  report "TEST FAILED" severity failure;
+    assert ( character'pos('W') = 87)  report "TEST FAILED" severity failure;
+    assert ( character'pos('X') = 88)  report "TEST FAILED" severity failure;
+    assert ( character'pos('Y') = 89)  report "TEST FAILED" severity failure;
+    assert ( character'pos('Z') = 90)  report "TEST FAILED" severity failure;
+    assert ( character'pos('[') = 91)  report "TEST FAILED" severity failure;
+    assert ( character'pos('\') = 92)  report "TEST FAILED" severity failure;
+    assert ( character'pos(']') = 93)  report "TEST FAILED" severity failure;
+    assert ( character'pos('^') = 94)  report "TEST FAILED" severity failure;
+    assert ( character'pos('_') = 95)  report "TEST FAILED" severity failure;
+    assert ( character'pos('`') = 96)  report "TEST FAILED" severity failure;
+    assert ( character'pos('a') = 97)  report "TEST FAILED" severity failure;
+    assert ( character'pos('b') = 98)  report "TEST FAILED" severity failure;
+    assert ( character'pos('c') = 99)  report "TEST FAILED" severity failure;
+    assert ( character'pos('d') = 100)  report "TEST FAILED" severity failure;
+    assert ( character'pos('e') = 101)  report "TEST FAILED" severity failure;
+    assert ( character'pos('f') = 102)  report "TEST FAILED" severity failure;
+    assert ( character'pos('g') = 103)  report "TEST FAILED" severity failure;
+    assert ( character'pos('h') = 104)  report "TEST FAILED" severity failure;
+    assert ( character'pos('i') = 105)  report "TEST FAILED" severity failure;
+    assert ( character'pos('j') = 106)  report "TEST FAILED" severity failure;
+    assert ( character'pos('k') = 107)  report "TEST FAILED" severity failure;
+    assert ( character'pos('l') = 108)  report "TEST FAILED" severity failure;
+    assert ( character'pos('m') = 109)  report "TEST FAILED" severity failure;
+    assert ( character'pos('n') = 110)  report "TEST FAILED" severity failure;
+    assert ( character'pos('o') = 111)  report "TEST FAILED" severity failure;
+    assert ( character'pos('p') = 112)  report "TEST FAILED" severity failure;
+    assert ( character'pos('q') = 113)  report "TEST FAILED" severity failure;
+    assert ( character'pos('r') = 114)  report "TEST FAILED" severity failure;
+    assert ( character'pos('s') = 115)  report "TEST FAILED" severity failure;
+    assert ( character'pos('t') = 116)  report "TEST FAILED" severity failure;
+    assert ( character'pos('u') = 117)  report "TEST FAILED" severity failure;
+    assert ( character'pos('v') = 118)  report "TEST FAILED" severity failure;
+    assert ( character'pos('w') = 119)  report "TEST FAILED" severity failure;
+    assert ( character'pos('x') = 120)  report "TEST FAILED" severity failure;
+    assert ( character'pos('y') = 121)  report "TEST FAILED" severity failure;
+    assert ( character'pos('z') = 122)  report "TEST FAILED" severity failure;
+    assert ( character'pos('{') = 123)  report "TEST FAILED" severity failure;
+    assert ( character'pos('|') = 124)  report "TEST FAILED" severity failure;
+    assert ( character'pos('}') = 125)  report "TEST FAILED" severity failure;
+    assert ( character'pos('~') = 126)  report "TEST FAILED" severity failure;
+    assert ( character'pos(DEL) = 127)  report "TEST FAILED" severity failure;
+    assert ( character'pos(character'right) = 255)  report "TEST FAILED" severity failure;
+    assert (bit'pos('0') = 0)  report "TEST FAILED" severity failure;
+    assert (bit'pos('1') = 1)  report "TEST FAILED" severity failure;
+    assert (bit'pos(bit'right) = 1)  report "TEST FAILED" severity failure;
+    assert (boolean'pos(false) = 0)  report "TEST FAILED" severity failure;
+    assert (boolean'pos(true)  = 1)  report "TEST FAILED" severity failure;
+    assert (boolean'pos(boolean'right) = 1)  report "TEST FAILED" severity failure;
+    assert (severity_level'pos(NOTE)    = 0)  report "TEST FAILED" severity failure;
+    assert (severity_level'pos(WARNING) = 1)  report "TEST FAILED" severity failure;
+    assert (severity_level'pos(ERROR)   = 2)  report "TEST FAILED" severity failure;
+    assert (severity_level'pos(FAILURE) = 3)  report "TEST FAILED" severity failure;
+    assert ( severity_level'pos(severity_level'right) = 3 ) report "TEST FAILED" severity failure;
+    report "TEST PASSED";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/resolved-integer-type.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/resolved-integer-type.vhdl
new file mode 100644
index 000000000..2a55fe20a
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/resolved-integer-type.vhdl
@@ -0,0 +1,44 @@
+entity test is
+end test;
+
+architecture only of test is
+  type integer_array is array ( natural range <> ) of integer;
+  
+  function return_biggest ( inputs : integer_array )
+    return integer is
+    variable retval : integer := integer'left;
+  begin
+    for i in inputs'range loop
+      if inputs(i) > retval then
+        retval := inputs(i);
+      end if;
+    end loop;  -- i
+    return retval;
+  end return_biggest;
+    
+  subtype biggest_wins is return_biggest integer;
+
+  signal common : biggest_wins;
+  
+begin  -- only
+
+  p1 : process
+  begin
+    common <= 1 after 1 ns;
+    wait;
+  end process;    
+
+  p2 : process
+  begin
+    common <= 1 after 1 ns;
+    wait;
+  end process;
+
+  test: process
+  begin
+    wait for 2 ns;
+    assert common = 1 report "TEST FAILED" severity failure;
+    wait;
+  end process;    
+  
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/subprogram-dynamic-type.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/subprogram-dynamic-type.vhdl
new file mode 100644
index 000000000..92f5347ac
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/integer-types/subprogram-dynamic-type.vhdl
@@ -0,0 +1,26 @@
+entity test is
+end test;
+
+architecture only of test is
+  procedure proc ( constant l : in integer;
+                   constant r : in integer ) is
+    type dyn is range l to r;
+    constant x : dyn;
+  begin
+    
+  if r = 3 then
+    assert x = 1 report "TEST FAILED" severity FAILURE;
+  elsif r = 42 then
+    assert x = 0 report "TEST FAILED" severity FAILURE;
+  end if;
+    
+  end proc;
+begin  -- only
+  doit: process
+  begin  -- process doit
+    proc( 1, 3 );
+    proc( 0, 42 );
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/date-record.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/date-record.vhdl
new file mode 100644
index 000000000..ea7b08995
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/date-record.vhdl
@@ -0,0 +1,25 @@
+entity test is
+end test;
+
+
+architecture only of test is
+
+  type month_name IS (Jan, Feb, Mar, Apr, May, Jun, Jul, Aug, Sep, Oct, Nov, Dec );
+  type date IS
+    record
+      day   : integer range 1 to 31;
+      month : month_name;
+      year  : integer range 0 to 4000;
+    end record;
+
+begin  -- only
+  p: process
+    constant christmas : date := ( 25, Dec, 0 );
+  begin  -- process p
+    assert christmas.day = 25 report "TEST FAILED" severity FAILURE;
+    assert christmas.month = Dec report "TEST FAILED" severity FAILURE;
+    assert christmas.year = 0 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+    wait;
+  end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/integer-record-aggregate-init.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/integer-record-aggregate-init.vhdl
new file mode 100644
index 000000000..dbd517043
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/integer-record-aggregate-init.vhdl
@@ -0,0 +1,21 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  type integerRecord is record
+                           foo : integer;
+                           bar : integer;
+                         end record;
+  variable myRecord : integerRecord;
+begin  -- process p
+  myRecord := ( 0, 1 );
+
+  assert myRecord.foo = 0 report "TEST FAILED - 0" severity FAILURE;
+  assert myRecord.bar = 1 report "TEST FAILED - 1" severity FAILURE;
+  report "TEST PASSED" severity NOTE;
+  
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/simple-integer-record.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/simple-integer-record.vhdl
new file mode 100644
index 000000000..b040eb853
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/record-types/simple-integer-record.vhdl
@@ -0,0 +1,22 @@
+entity test is
+end test;
+
+architecture only of test is
+begin  -- only
+p: process
+  type integerRecord is record
+                           foo : integer;
+                           bar : integer;
+                         end record;
+  variable myRecord : integerRecord;
+begin  -- process p
+  myRecord.foo := 0;
+  myRecord.bar := 1;    
+
+  assert myRecord.foo = 0 report "TEST FAILED" severity FAILURE;
+  assert myRecord.bar = 1 report "TEST FAILED" severity FAILURE;
+  report "TEST PASSED" severity NOTE;
+  
+  wait;
+end process p;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/simple-subtypes.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/simple-subtypes.vhdl
new file mode 100644
index 000000000..a3e127e83
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/types/simple-subtypes.vhdl
@@ -0,0 +1,41 @@
+entity test is
+end test;
+
+architecture only of test is
+
+begin  -- only
+  doit: process
+    subtype tboolean        is boolean        range FALSE to TRUE;
+    subtype tbit            is bit            range '0'   to '1';   
+    subtype tcharacter      is character      range 'A'   to 'Z';
+    subtype tseverity_level is severity_level range NOTE  to ERROR;
+    subtype tinteger        is integer        range 1111  to 2222;
+    subtype treal           is real           range 1.11  to 2.22;
+    subtype ttime           is time           range 1 ns  to 1 hr;
+    subtype tnatural        is natural        range 100   to 200;
+    subtype tpositive       is positive       range 1000  to 2000;
+
+    variable k1  : tboolean;
+    variable k2  : tbit;
+    variable k3  : tcharacter;
+    variable k4  : tseverity_level;
+    variable k5  : tinteger;
+    variable k6  : treal;
+    variable k7  : ttime;
+    variable k8  : tnatural;
+    variable k9  : tpositive;
+    
+  begin  -- process doit
+    assert( k1 = tboolean'left        ) report "TEST FAILED" severity failure;
+    assert( k2 = tbit'left            ) report "TEST FAILED" severity FAILURE;
+    assert( k3 = tcharacter'left      ) report "TEST FAILED" severity FAILURE;
+    assert( k4 = tseverity_level'left ) report "TEST FAILED" severity FAILURE;
+    assert( k5 = tinteger'left        ) report "TEST FAILED" severity FAILURE;
+    assert( k6 = treal'left           ) report "TEST FAILED" severity FAILURE;
+    assert( k7 = ttime'left           ) report "TEST FAILED" severity FAILURE;
+    assert( k8 = tnatural'left        ) report "TEST FAILED" severity FAILURE;
+    assert( k9 = tpositive'left       ) report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED";
+    wait;
+  end process doit;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/integer-variable-persist-across-activations.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/integer-variable-persist-across-activations.vhdl
new file mode 100644
index 000000000..4cccc0826
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/integer-variable-persist-across-activations.vhdl
@@ -0,0 +1,28 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+  signal clock : bit;
+  signal last_x : integer := 0;
+begin  -- only
+  process (clock)
+    variable x : integer := 0;
+  begin  -- process
+    last_x <= x;
+    x := x + 1;
+    wait for 1 fs;
+    assert x > last_x report "TEST FAILED" severity FAILURE;
+    assert x > 0 report "TEST FAILED" severity FAILURE;
+    report "TEST PASSED" severity NOTE;
+  end process;
+
+  process
+  begin  -- process
+    clock <= '1' after 1 ns,
+             '0' after 2 ns,
+             '1' after 3 ns;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-enumeration-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-enumeration-assign.vhdl
new file mode 100644
index 000000000..e324a398e
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-enumeration-assign.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : boolean := false;
+  begin  -- process
+    x := true;
+    assert x = true report "TEST FAILED - x does not equal true" severity failure;
+    assert x /= true report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-assign.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-assign.vhdl
new file mode 100644
index 000000000..265cadbce
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-assign.vhdl
@@ -0,0 +1,16 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 0;
+  begin  -- process
+    x := 1;
+    assert x = 1 report "TEST FAILED - x does not equal 1" severity failure;
+    assert x /= 1 report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-initialize.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-initialize.vhdl
new file mode 100644
index 000000000..fc2ded3b5
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/variable/simple-integer-initialize.vhdl
@@ -0,0 +1,15 @@
+entity foo is
+end foo;
+
+use std.textio.all;
+
+architecture only of foo is
+begin  -- only
+  process
+    variable x : integer := 0;
+  begin  -- process
+    assert x = 0 report "TEST FAILED - x does not equal 1" severity failure;
+    report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
-- 
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