From 6c3f709174e8e4d5411f851cedb7d84c38d3b04a Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 20 Dec 2013 04:48:54 +0100 Subject: Import vests testsuite --- .../vests/vhdl-93/ashenden/compliant/ch_06_mac.vhd | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 testsuite/vests/vhdl-93/ashenden/compliant/ch_06_mac.vhd (limited to 'testsuite/vests/vhdl-93/ashenden/compliant/ch_06_mac.vhd') diff --git a/testsuite/vests/vhdl-93/ashenden/compliant/ch_06_mac.vhd b/testsuite/vests/vhdl-93/ashenden/compliant/ch_06_mac.vhd new file mode 100644 index 000000000..7519f5a9d --- /dev/null +++ b/testsuite/vests/vhdl-93/ashenden/compliant/ch_06_mac.vhd @@ -0,0 +1,39 @@ + +-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc + +-- This file is part of VESTs (Vhdl tESTs). + +-- VESTs is free software; you can redistribute it and/or modify it +-- under the terms of the GNU General Public License as published by the +-- Free Software Foundation; either version 2 of the License, or (at +-- your option) any later version. + +-- VESTs is distributed in the hope that it will be useful, but WITHOUT +-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: ch_06_mac.vhd,v 1.3 2001-11-03 23:19:37 paw Exp $ +-- $Revision: 1.3 $ +-- +-- --------------------------------------------------------------------- + +library ieee; +use ieee.std_logic_1164.all; + +entity mac is + port ( clk, clr : in std_ulogic; + x_real : in std_ulogic_vector(15 downto 0); + x_imag : in std_ulogic_vector(15 downto 0); + y_real : in std_ulogic_vector(15 downto 0); + y_imag : in std_ulogic_vector(15 downto 0); + s_real : out std_ulogic_vector(15 downto 0); + s_imag : out std_ulogic_vector(15 downto 0); + ovf : out std_ulogic ); +end entity mac; -- cgit v1.2.3