From caad9e78229b7c3cffb0e4f401a2a20179783b91 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 2 Mar 2022 06:22:41 +0100 Subject: testsuite/synth: add a test for #1991 --- testsuite/synth/issue1991/issue.vhdl | 28 ++++++++++++++++++++++++++++ testsuite/synth/issue1991/testsuite.sh | 7 +++++++ 2 files changed, 35 insertions(+) create mode 100644 testsuite/synth/issue1991/issue.vhdl create mode 100755 testsuite/synth/issue1991/testsuite.sh (limited to 'testsuite/synth') diff --git a/testsuite/synth/issue1991/issue.vhdl b/testsuite/synth/issue1991/issue.vhdl new file mode 100644 index 000000000..a0c5967c5 --- /dev/null +++ b/testsuite/synth/issue1991/issue.vhdl @@ -0,0 +1,28 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity issue is + port ( + clk : in std_logic; + idx : in std_logic_vector(7 downto 0); + led : out std_logic + ); +end issue; + +architecture implementation of issue is + +begin + + process(clk) + begin + if (rising_edge (clk)) then + if idx <= x"10000000" then + led <= '1'; + else + led <= '0'; + end if; + end if; + end process; + +end implementation; diff --git a/testsuite/synth/issue1991/testsuite.sh b/testsuite/synth/issue1991/testsuite.sh new file mode 100755 index 000000000..53b1b69ab --- /dev/null +++ b/testsuite/synth/issue1991/testsuite.sh @@ -0,0 +1,7 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only issue + +echo "Test successful" -- cgit v1.2.3