From 43f3ab99bf70faba67910b8051bfcca17fb3799a Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 17 Feb 2022 19:05:56 +0100 Subject: testsuite/synth: add a test for #1977 --- testsuite/synth/issue1977/testsuite.sh | 8 ++++ testsuite/synth/issue1977/triangularcounter.vhdl | 48 ++++++++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100755 testsuite/synth/issue1977/testsuite.sh create mode 100644 testsuite/synth/issue1977/triangularcounter.vhdl (limited to 'testsuite/synth') diff --git a/testsuite/synth/issue1977/testsuite.sh b/testsuite/synth/issue1977/testsuite.sh new file mode 100755 index 000000000..665792ea1 --- /dev/null +++ b/testsuite/synth/issue1977/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 +synth_only triangularcounter + +echo "Test successful" diff --git a/testsuite/synth/issue1977/triangularcounter.vhdl b/testsuite/synth/issue1977/triangularcounter.vhdl new file mode 100644 index 000000000..c1851de19 --- /dev/null +++ b/testsuite/synth/issue1977/triangularcounter.vhdl @@ -0,0 +1,48 @@ +library IEEE; +context IEEE.IEEE_std_context; + +entity TriangularCounter is + generic ( + g_Precision : natural := 11 + ); + port ( + CLK : in std_logic; + RST : in std_logic; + EN : in std_logic; + REF : out unsigned(g_Precision-1 downto 0); + TRIGGER : out std_logic + ); +end entity; + +architecture arch of TriangularCounter is + + signal dir : std_logic; + signal cnt : unsigned(REF'range); + signal tg_max : std_logic; + signal tg_min : std_logic; + +begin + + process(RST, CLK) + begin + if RST then + cnt <= (others=>'0'); + dir <= '0'; + elsif rising_edge(CLK) then + if EN then + cnt <= cnt-1 when dir else cnt+1; + if tg_min or tg_max then + dir <= not dir; + end if; + end if; + end if; + end process; + + tg_max <= (not dir) and (cnt ?= to_unsigned(2**g_Precision-2, REF)); + tg_min <= dir and (cnt ?= 1); + + REF <= cnt; + TRIGGER <= tg_min; + +end architecture; + -- cgit v1.2.3