From ea460cb31034202c6d6d3fd720126fd0bedd8820 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 14 Mar 2023 08:18:13 +0100
Subject: testsuite/synth: add a test for #2390

---
 testsuite/synth/issue2390/rom.vhdl | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 testsuite/synth/issue2390/rom.vhdl

(limited to 'testsuite/synth/issue2390/rom.vhdl')

diff --git a/testsuite/synth/issue2390/rom.vhdl b/testsuite/synth/issue2390/rom.vhdl
new file mode 100644
index 000000000..07c068ebf
--- /dev/null
+++ b/testsuite/synth/issue2390/rom.vhdl
@@ -0,0 +1,21 @@
+library ieee;
+context ieee.ieee_std_context;
+use work.uCPUtypes.all;
+
+entity ROM is
+  port (
+    abus : in  unsigned_byte;
+    dbus : out code_word;
+    en   : in  logic
+  );
+end entity ROM;
+
+architecture RTL of ROM is
+  type memory is array (0 to 255) of code_word;
+  constant mem : memory := (x"777", others => x"000");
+begin
+
+dbus <= mem(to_integer(abus)) when en else x"ZZZ";
+
+end architecture RTL;
+
-- 
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