From 2bb61759d873dcffc8943f667073d472ca21a6dc Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 30 Nov 2019 10:25:21 +0100
Subject: testsuite: add some tests for #1044

---
 testsuite/synth/issue1044/ent.vhdl     | 19 +++++++++++++++++++
 testsuite/synth/issue1044/testsuite.sh | 12 ++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 testsuite/synth/issue1044/ent.vhdl
 create mode 100755 testsuite/synth/issue1044/testsuite.sh

(limited to 'testsuite/synth/issue1044')

diff --git a/testsuite/synth/issue1044/ent.vhdl b/testsuite/synth/issue1044/ent.vhdl
new file mode 100644
index 000000000..fc98054d0
--- /dev/null
+++ b/testsuite/synth/issue1044/ent.vhdl
@@ -0,0 +1,19 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ent is
+	generic (
+		VAL : real := 1.5
+	);
+	port (
+		lt  : out std_logic
+	);
+end;
+
+architecture a of ent is
+   constant fmul : real := val * 5.0;
+   constant fneg : real := -val;
+begin
+	lt  <= '1' when VAL  < 1.5 else '0';
+end;
+
diff --git a/testsuite/synth/issue1044/testsuite.sh b/testsuite/synth/issue1044/testsuite.sh
new file mode 100755
index 000000000..bc454cfda
--- /dev/null
+++ b/testsuite/synth/issue1044/testsuite.sh
@@ -0,0 +1,12 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+for t in ent; do
+  synth $t.vhdl -e $t > syn_$t.vhdl
+  analyze syn_$t.vhdl
+done
+
+clean
+
+echo "Test successful"
-- 
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