From 0af513e7b59a01f456f6f76369cedf67d8ffc5cf Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 21 Nov 2022 08:03:20 +0100 Subject: vhdl-parse: handle inside comments --- testsuite/pyunit/DesignComment.vhdl | 14 -------------- testsuite/pyunit/libghdl/DesignComment.vhdl | 14 ++++++++++++++ 2 files changed, 14 insertions(+), 14 deletions(-) delete mode 100644 testsuite/pyunit/DesignComment.vhdl create mode 100644 testsuite/pyunit/libghdl/DesignComment.vhdl (limited to 'testsuite/pyunit') diff --git a/testsuite/pyunit/DesignComment.vhdl b/testsuite/pyunit/DesignComment.vhdl deleted file mode 100644 index 5cd555d33..000000000 --- a/testsuite/pyunit/DesignComment.vhdl +++ /dev/null @@ -1,14 +0,0 @@ --- No copyright for :accum: design. - -library ieee; -use ieee.std_logic_1164.all; - -entity accum is - port ( - -- :a: and :b: are the inputs of the adder. - a, b : in std_logic_vector (31 downto 0); - -- :res: is the result of the adder. - res : out std_logic_vector (31 downto 0) - ); -end accum; - diff --git a/testsuite/pyunit/libghdl/DesignComment.vhdl b/testsuite/pyunit/libghdl/DesignComment.vhdl new file mode 100644 index 000000000..5cd555d33 --- /dev/null +++ b/testsuite/pyunit/libghdl/DesignComment.vhdl @@ -0,0 +1,14 @@ +-- No copyright for :accum: design. + +library ieee; +use ieee.std_logic_1164.all; + +entity accum is + port ( + -- :a: and :b: are the inputs of the adder. + a, b : in std_logic_vector (31 downto 0); + -- :res: is the result of the adder. + res : out std_logic_vector (31 downto 0) + ); +end accum; + -- cgit v1.2.3