From 8a2bd07c3f7a3f99aa3cf0017dbba69df28aa1b9 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 25 Nov 2019 06:51:20 +0100
Subject: testsuite: add a testcase for #264

---
 testsuite/gna/issue264/ex1_top.vhdl | 24 ++++++++++++++++++++++++
 testsuite/gna/issue264/testsuite.sh |  7 +++++++
 2 files changed, 31 insertions(+)
 create mode 100644 testsuite/gna/issue264/ex1_top.vhdl
 create mode 100755 testsuite/gna/issue264/testsuite.sh

(limited to 'testsuite/gna')

diff --git a/testsuite/gna/issue264/ex1_top.vhdl b/testsuite/gna/issue264/ex1_top.vhdl
new file mode 100644
index 000000000..c7a268b71
--- /dev/null
+++ b/testsuite/gna/issue264/ex1_top.vhdl
@@ -0,0 +1,24 @@
+entity ex1_entity is
+  port (
+    X : inout boolean            -- std_logic works
+  );
+end entity;
+
+architecture a of ex1_entity is
+begin
+end architecture;
+
+library IEEE;
+use     IEEE.std_logic_1164.all;
+
+entity ex1_top is
+end entity;
+
+architecture a of ex1_top is
+  signal A : std_logic;
+begin
+  inst : entity work.ex1_entity
+    port map (
+      X => A               -- line containing error
+    );
+end architecture;
diff --git a/testsuite/gna/issue264/testsuite.sh b/testsuite/gna/issue264/testsuite.sh
new file mode 100755
index 000000000..f3b73761f
--- /dev/null
+++ b/testsuite/gna/issue264/testsuite.sh
@@ -0,0 +1,7 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze_failure ex1_top.vhdl
+
+echo "Test successful"
-- 
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