From 6cf0482cb1fd97580fcedb2eec4362410e2b873c Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 3 Jul 2019 21:17:07 +0200
Subject: Add test for previous commit.

---
 testsuite/gna/bug0103/repro.vhdl   | 27 +++++++++++++++++++++++++++
 testsuite/gna/bug0103/testsuite.sh | 11 +++++++++++
 2 files changed, 38 insertions(+)
 create mode 100644 testsuite/gna/bug0103/repro.vhdl
 create mode 100755 testsuite/gna/bug0103/testsuite.sh

(limited to 'testsuite/gna')

diff --git a/testsuite/gna/bug0103/repro.vhdl b/testsuite/gna/bug0103/repro.vhdl
new file mode 100644
index 000000000..448cf6794
--- /dev/null
+++ b/testsuite/gna/bug0103/repro.vhdl
@@ -0,0 +1,27 @@
+entity repro is
+end repro;
+
+entity buf is
+  port (i : bit; o : out bit);
+end buf;
+
+architecture behav of buf is
+begin
+  o <= i;
+end behav;
+
+architecture behav of repro is
+  signal a, b : bit;
+  signal r : bit;
+begin
+  dut: entity work.buf port map (i => a xor b, o => r);
+  process
+  begin
+    a <= '0';
+    b <= '1';
+    wait for 1 ns;
+    assert r = '1' severity failure;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/gna/bug0103/testsuite.sh b/testsuite/gna/bug0103/testsuite.sh
new file mode 100755
index 000000000..8d22a2073
--- /dev/null
+++ b/testsuite/gna/bug0103/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro
+
+clean
+
+echo "Test successful"
-- 
cgit v1.2.3