From 1cbe9b82221a2da874ab2b12463b42eee5cfaaa7 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sun, 23 Sep 2018 07:49:46 +0200
Subject: Add reproducer for #643

---
 testsuite/gna/issue643/ent.vhdl     | 31 +++++++++++++++++++++++++++++++
 testsuite/gna/issue643/repro.vhdl   | 13 +++++++++++++
 testsuite/gna/issue643/testsuite.sh | 14 ++++++++++++++
 3 files changed, 58 insertions(+)
 create mode 100644 testsuite/gna/issue643/ent.vhdl
 create mode 100644 testsuite/gna/issue643/repro.vhdl
 create mode 100755 testsuite/gna/issue643/testsuite.sh

(limited to 'testsuite/gna')

diff --git a/testsuite/gna/issue643/ent.vhdl b/testsuite/gna/issue643/ent.vhdl
new file mode 100644
index 000000000..07b368f6e
--- /dev/null
+++ b/testsuite/gna/issue643/ent.vhdl
@@ -0,0 +1,31 @@
+library ieee;
+use     ieee.std_logic_1164.all;
+
+entity test is
+end entity;
+
+architecture a of test is
+	type RegisterNames is (
+		LENGTH,
+		PATTERN_0, PATTERN_1,
+		COLOR_0, COLOR_1, COLOR_2, COLOR_3
+	);
+	type RegisterFile is array(RegisterNames) of std_logic_vector(31 downto 0);
+	
+	signal Reg : RegisterFile := (
+		LENGTH => 32d"4",
+		PATTERN_0 => (
+			1 downto 0 => "01",  -- line 18:  can't match string literal with type anonymous enumeration subtype defined at std_logic_1164.v08:89:32
+			3 downto 2 => "11",  -- line 19:  can't match string literal with type anonymous enumeration subtype defined at std_logic_1164.v08:89:32
+			5 downto 4 => "01",  -- line 20:  can't match string literal with type anonymous enumeration subtype defined at std_logic_1164.v08:89:32
+			7 downto 6 => "10",  -- line 21:  can't match string literal with type anonymous enumeration subtype defined at std_logic_1164.v08:89:32
+			others => '0'
+		),
+		COLOR_0 => x"----_00_00",
+		COLOR_1 => x"----_00_FF",
+		COLOR_2 => x"----_FF_33",
+		COLOR_3 => x"----_CC_99",
+		others => (others => '0')
+	);
+begin
+end architecture;
diff --git a/testsuite/gna/issue643/repro.vhdl b/testsuite/gna/issue643/repro.vhdl
new file mode 100644
index 000000000..aeb8d06ae
--- /dev/null
+++ b/testsuite/gna/issue643/repro.vhdl
@@ -0,0 +1,13 @@
+entity repro is
+end entity;
+
+architecture a of repro is
+  constant C_PATTERN_0 : bit_vector(31 downto 0) := (
+     1 downto  0 => "01",
+     3 downto  2 => "11",
+     5 downto  4 => "01",
+     7 downto  6 => "10",
+    others =>       '0'
+  );
+begin
+end architecture;
diff --git a/testsuite/gna/issue643/testsuite.sh b/testsuite/gna/issue643/testsuite.sh
new file mode 100755
index 000000000..e132bd00e
--- /dev/null
+++ b/testsuite/gna/issue643/testsuite.sh
@@ -0,0 +1,14 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro
+
+analyze ent.vhdl
+elab_simulate test
+
+clean
+
+echo "Test successful"
-- 
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