From d5d8471efc3ef7586035ebc57a41f420621d4343 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 15 May 2019 20:41:27 +0200 Subject: Add testcase for #788 --- testsuite/gna/issue788/repro.vhdl | 29 +++++++++++++++++++++++++++++ testsuite/gna/issue788/testsuite.sh | 11 +++++++++++ 2 files changed, 40 insertions(+) create mode 100644 testsuite/gna/issue788/repro.vhdl create mode 100755 testsuite/gna/issue788/testsuite.sh (limited to 'testsuite/gna/issue788') diff --git a/testsuite/gna/issue788/repro.vhdl b/testsuite/gna/issue788/repro.vhdl new file mode 100644 index 000000000..f6bbc8899 --- /dev/null +++ b/testsuite/gna/issue788/repro.vhdl @@ -0,0 +1,29 @@ +entity repro is +end repro; + +architecture behav of repro is + type word_vector is array (natural range <>) of bit_vector (7 downto 0); + + type trans is record + header : natural; + bod : word_vector; + end record; + + signal s : trans (bod(0 to 3)); + + procedure check (t1 : trans) is + begin + assert t1.header = 0; + end check; + + procedure check2 (signal t : trans) is + begin + check (t); + end check2; +begin + process + begin + check2 (s); + wait; + end process; +end behav; diff --git a/testsuite/gna/issue788/testsuite.sh b/testsuite/gna/issue788/testsuite.sh new file mode 100755 index 000000000..8d22a2073 --- /dev/null +++ b/testsuite/gna/issue788/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +analyze repro.vhdl +elab_simulate repro + +clean + +echo "Test successful" -- cgit v1.2.3