From 7c1a8746d2b4fc076bcb287c8917af750a6b3d58 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 8 Dec 2017 06:56:55 +0100 Subject: Add testcase for #478 --- testsuite/gna/issue478/repro.vhdl | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 testsuite/gna/issue478/repro.vhdl (limited to 'testsuite/gna/issue478/repro.vhdl') diff --git a/testsuite/gna/issue478/repro.vhdl b/testsuite/gna/issue478/repro.vhdl new file mode 100644 index 000000000..e0a424ae7 --- /dev/null +++ b/testsuite/gna/issue478/repro.vhdl @@ -0,0 +1,20 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity EX_ALUControl is +end entity; + +architecture foo of EX_ALUControl is + signal RST: std_logic; + signal RDY: std_logic; + signal reentry_guard: std_logic; +begin + +NO_LABEL: + process (RST, RDY, reentry_guard) + begin + report "In EX_ALUControl (RST=" & Std_logic'image(RST) & ", RDY=" & + Std_logic'image(RDY) & ", re=" & + Std_logic'image(reentry_guard) ")"; -- MISSING AMPERSAND + end process; +end architecture; -- cgit v1.2.3