From d70084ccb149ff4f5fca072c672b1f3d040358a9 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 11 Mar 2020 21:09:39 +0100 Subject: psl: keep denoting names in the PSL ast. --- src/psl/psl-hash.adb | 4 +-- src/psl/psl-nfas-utils.adb | 2 +- src/psl/psl-nodes.adb | 20 +++++++++++- src/psl/psl-nodes.adb.in | 3 +- src/psl/psl-nodes.ads | 20 +++++++++++- src/psl/psl-nodes_meta.adb | 50 ++++++++++++++++++++++------- src/psl/psl-nodes_meta.ads | 2 ++ src/psl/psl-prints.adb | 4 ++- src/psl/psl-qm.adb | 2 +- src/psl/psl-rewrites.adb | 2 ++ src/psl/psl-subsets.adb | 3 +- src/synth/synth-stmts.adb | 7 ++-- src/vhdl/simulate/simul-simulation-main.adb | 3 +- src/vhdl/translate/trans-chap9.adb | 3 +- src/vhdl/vhdl-canon.adb | 3 +- src/vhdl/vhdl-canon_psl.adb | 3 +- src/vhdl/vhdl-parse_psl.adb | 1 + src/vhdl/vhdl-prints.adb | 3 +- src/vhdl/vhdl-sem_psl.adb | 34 ++++++++++++++------ 19 files changed, 129 insertions(+), 40 deletions(-) (limited to 'src') diff --git a/src/psl/psl-hash.adb b/src/psl/psl-hash.adb index b2bdccc79..89394c97d 100644 --- a/src/psl/psl-hash.adb +++ b/src/psl/psl-hash.adb @@ -53,7 +53,7 @@ package body PSL.Hash is -- In the primary table. Res := Cells.Table (Idx).Res; if Res = Null_Node then - Res := Create_Node (N_HDL_Expr); + Res := Create_Node (N_HDL_Bool); Set_HDL_Node (Res, Hdl); Cells.Table (Idx).Res := Res; return Res; @@ -69,7 +69,7 @@ package body PSL.Hash is Idx := N_Idx; Res := Cells.Table (Idx).Res; end loop; - Res := Create_Node (N_HDL_Expr); + Res := Create_Node (N_HDL_Bool); Set_HDL_Node (Res, Hdl); Cells.Append ((Res => Res, Next => No_Index)); Cells.Table (Idx).Next := Cells.Last; diff --git a/src/psl/psl-nfas-utils.adb b/src/psl/psl-nfas-utils.adb index 5a5f01dab..283560719 100644 --- a/src/psl/psl-nfas-utils.adb +++ b/src/psl/psl-nfas-utils.adb @@ -339,7 +339,7 @@ package body PSL.NFAs.Utils is return True; when N_False | N_True - | N_HDL_Expr => + | N_HDL_Bool => return False; when N_Not_Bool => return Has_EOS (Get_Boolean (N)); diff --git a/src/psl/psl-nodes.adb b/src/psl/psl-nodes.adb index 99b449d22..629041a73 100644 --- a/src/psl/psl-nodes.adb +++ b/src/psl/psl-nodes.adb @@ -374,7 +374,8 @@ package body PSL.Nodes is | N_False | N_True | N_Boolean_Parameter - | N_Paren_Bool => + | N_Paren_Bool + | N_HDL_Bool => return Type_Boolean; when N_Number | N_Const_Parameter => @@ -460,6 +461,7 @@ package body PSL.Nodes is | N_Or_Bool | N_Imp_Bool | N_HDL_Expr + | N_HDL_Bool | N_False | N_True | N_EOS @@ -854,6 +856,22 @@ package body PSL.Nodes is Set_Field2 (N, Int32_To_Node (Idx)); end Set_HDL_Index; + function Get_HDL_Hash (N : Node) return Node is + begin + pragma Assert (N /= Null_Node); + pragma Assert (Has_HDL_Hash (Get_Kind (N)), + "no field HDL_Hash"); + return Get_Field5 (N); + end Get_HDL_Hash; + + procedure Set_HDL_Hash (N : Node; H : Node) is + begin + pragma Assert (N /= Null_Node); + pragma Assert (Has_HDL_Hash (Get_Kind (N)), + "no field HDL_Hash"); + Set_Field5 (N, H); + end Set_HDL_Hash; + function Get_Presence (N : Node) return PSL_Presence_Kind is begin pragma Assert (N /= Null_Node); diff --git a/src/psl/psl-nodes.adb.in b/src/psl/psl-nodes.adb.in index 3c7888800..a7d34b64a 100644 --- a/src/psl/psl-nodes.adb.in +++ b/src/psl/psl-nodes.adb.in @@ -374,7 +374,8 @@ package body PSL.Nodes is | N_False | N_True | N_Boolean_Parameter - | N_Paren_Bool => + | N_Paren_Bool + | N_HDL_Bool => return Type_Boolean; when N_Number | N_Const_Parameter => diff --git a/src/psl/psl-nodes.ads b/src/psl/psl-nodes.ads index 0b11d0641..d5d3b93f5 100644 --- a/src/psl/psl-nodes.ads +++ b/src/psl/psl-nodes.ads @@ -92,6 +92,7 @@ package PSL.Nodes is N_Or_Bool, N_Imp_Bool, -- -> N_HDL_Expr, + N_HDL_Bool, N_False, N_True, N_EOS, @@ -105,6 +106,8 @@ package PSL.Nodes is subtype N_Booleans is Nkind range N_Paren_Bool .. N_True; subtype N_Sequences is Nkind range N_Braced_SERE .. N_Equal_Repeat_Seq; + subtype N_HDLs is Nkind range N_HDL_Expr .. N_HDL_Bool; + type PSL_Types is ( Type_Unknown, @@ -372,7 +375,8 @@ package PSL.Nodes is -- Get/Set_Boolean (Field3) - -- N_HDL_Expr (Short) + -- N_HDL_Bool (Short) + -- An HDL expression of boolean type, that could be hashed. -- -- Get/Set_Presence (State1) -- @@ -384,6 +388,15 @@ package PSL.Nodes is -- -- Get/Set_Hash_Link (Field6) + -- N_HDL_Expr (Short) + -- An HDL expression. Just a proxy to the N_HDL_Bool. The node + -- is removed when rewritten. This node is present so that denoting + -- names are kept in the PSL tree. + -- + -- Get/Set_HDL_Node (Field1) + -- + -- Get/Set_HDL_Hash (Field5) + -- N_Paren_Bool (Short) -- -- Get/Set_Presence (State1) @@ -574,6 +587,11 @@ package PSL.Nodes is function Get_HDL_Index (N : Node) return Int32; procedure Set_HDL_Index (N : Node; Idx : Int32); + -- Link the the hash-able node. + -- Field: Field5 + function Get_HDL_Hash (N : Node) return Node; + procedure Set_HDL_Hash (N : Node; H : Node); + -- Field: State1 (pos) function Get_Presence (N : Node) return PSL_Presence_Kind; procedure Set_Presence (N : Node; P : PSL_Presence_Kind); diff --git a/src/psl/psl-nodes_meta.adb b/src/psl/psl-nodes_meta.adb index f33ac5122..ef5808fe4 100644 --- a/src/psl/psl-nodes_meta.adb +++ b/src/psl/psl-nodes_meta.adb @@ -43,6 +43,7 @@ package body PSL.Nodes_Meta is Field_Hash => Type_Uns32, Field_Hash_Link => Type_Node, Field_HDL_Index => Type_Int32, + Field_HDL_Hash => Type_Node, Field_Presence => Type_PSL_Presence_Kind, Field_NFA => Type_NFA, Field_Parameter_List => Type_Node, @@ -109,6 +110,8 @@ package body PSL.Nodes_Meta is return "hash_link"; when Field_HDL_Index => return "hdl_index"; + when Field_HDL_Hash => + return "hdl_hash"; when Field_Presence => return "presence"; when Field_NFA => @@ -241,6 +244,8 @@ package body PSL.Nodes_Meta is return "imp_bool"; when N_HDL_Expr => return "hdl_expr"; + when N_HDL_Bool => + return "hdl_bool"; when N_False => return "false"; when N_True => @@ -307,6 +312,8 @@ package body PSL.Nodes_Meta is return Attr_None; when Field_HDL_Index => return Attr_None; + when Field_HDL_Hash => + return Attr_None; when Field_Presence => return Attr_None; when Field_NFA => @@ -537,6 +544,9 @@ package body PSL.Nodes_Meta is Field_Hash_Link, -- N_HDL_Expr Field_HDL_Node, + Field_HDL_Hash, + -- N_HDL_Bool + Field_HDL_Node, Field_HDL_Index, Field_Hash, Field_Presence, @@ -613,13 +623,14 @@ package body PSL.Nodes_Meta is N_And_Bool => 142, N_Or_Bool => 147, N_Imp_Bool => 152, - N_HDL_Expr => 157, - N_False => 157, - N_True => 157, - N_EOS => 160, - N_Name => 162, - N_Name_Decl => 164, - N_Number => 165 + N_HDL_Expr => 154, + N_HDL_Bool => 159, + N_False => 159, + N_True => 159, + N_EOS => 162, + N_Name => 164, + N_Name_Decl => 166, + N_Number => 167 ); function Get_Fields (K : Nkind) return Fields_Array @@ -801,6 +812,8 @@ package body PSL.Nodes_Meta is return Get_Decl (N); when Field_Hash_Link => return Get_Hash_Link (N); + when Field_HDL_Hash => + return Get_HDL_Hash (N); when Field_Parameter_List => return Get_Parameter_List (N); when Field_Actual => @@ -855,6 +868,8 @@ package body PSL.Nodes_Meta is Set_Decl (N, V); when Field_Hash_Link => Set_Hash_Link (N, V); + when Field_HDL_Hash => + Set_HDL_Hash (N, V); when Field_Parameter_List => Set_Parameter_List (N, V); when Field_Actual => @@ -1207,7 +1222,13 @@ package body PSL.Nodes_Meta is function Has_HDL_Node (K : Nkind) return Boolean is begin - return K = N_HDL_Expr; + case K is + when N_HDL_Expr + | N_HDL_Bool => + return True; + when others => + return False; + end case; end Has_HDL_Node; function Has_Hash (K : Nkind) return Boolean is @@ -1218,7 +1239,7 @@ package body PSL.Nodes_Meta is | N_And_Bool | N_Or_Bool | N_Imp_Bool - | N_HDL_Expr + | N_HDL_Bool | N_EOS => return True; when others => @@ -1234,7 +1255,7 @@ package body PSL.Nodes_Meta is | N_And_Bool | N_Or_Bool | N_Imp_Bool - | N_HDL_Expr + | N_HDL_Bool | N_EOS => return True; when others => @@ -1245,7 +1266,7 @@ package body PSL.Nodes_Meta is function Has_HDL_Index (K : Nkind) return Boolean is begin case K is - when N_HDL_Expr + when N_HDL_Bool | N_EOS => return True; when others => @@ -1253,6 +1274,11 @@ package body PSL.Nodes_Meta is end case; end Has_HDL_Index; + function Has_HDL_Hash (K : Nkind) return Boolean is + begin + return K = N_HDL_Expr; + end Has_HDL_Hash; + function Has_Presence (K : Nkind) return Boolean is begin case K is @@ -1261,7 +1287,7 @@ package body PSL.Nodes_Meta is | N_And_Bool | N_Or_Bool | N_Imp_Bool - | N_HDL_Expr => + | N_HDL_Bool => return True; when others => return False; diff --git a/src/psl/psl-nodes_meta.ads b/src/psl/psl-nodes_meta.ads index e8df654b6..5319f407a 100644 --- a/src/psl/psl-nodes_meta.ads +++ b/src/psl/psl-nodes_meta.ads @@ -60,6 +60,7 @@ package PSL.Nodes_Meta is Field_Hash, Field_Hash_Link, Field_HDL_Index, + Field_HDL_Hash, Field_Presence, Field_NFA, Field_Parameter_List, @@ -163,6 +164,7 @@ package PSL.Nodes_Meta is function Has_Hash (K : Nkind) return Boolean; function Has_Hash_Link (K : Nkind) return Boolean; function Has_HDL_Index (K : Nkind) return Boolean; + function Has_HDL_Hash (K : Nkind) return Boolean; function Has_Presence (K : Nkind) return Boolean; function Has_NFA (K : Nkind) return Boolean; function Has_Parameter_List (K : Nkind) return Boolean; diff --git a/src/psl/psl-prints.adb b/src/psl/psl-prints.adb index cdd99c0c3..4cadc3f97 100644 --- a/src/psl/psl-prints.adb +++ b/src/psl/psl-prints.adb @@ -71,6 +71,7 @@ package body PSL.Prints is | N_False | N_EOS | N_HDL_Expr + | N_HDL_Bool | N_Property_Instance | N_Sequence_Instance => return Prio_HDL; @@ -152,7 +153,8 @@ package body PSL.Prints is end; when N_Name_Decl => Put (Image (Get_Identifier (N))); - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => if HDL_Expr_Printer = null then Put ("HDL_Expr"); else diff --git a/src/psl/psl-qm.adb b/src/psl/psl-qm.adb index 41f8e1001..722577018 100644 --- a/src/psl/psl-qm.adb +++ b/src/psl/psl-qm.adb @@ -197,7 +197,7 @@ package body PSL.QM is function Build_Primes (N : Node; Negate : Boolean) return Primes_Set is begin case Get_Kind (N) is - when N_HDL_Expr + when N_HDL_Bool | N_EOS => declare Res : Primes_Set (1); diff --git a/src/psl/psl-rewrites.adb b/src/psl/psl-rewrites.adb index e06ddd323..35bce015d 100644 --- a/src/psl/psl-rewrites.adb +++ b/src/psl/psl-rewrites.adb @@ -109,6 +109,8 @@ package body PSL.Rewrites is Set_Right (N, Rewrite_Boolean (Get_Right (N))); return N; when N_HDL_Expr => + return Get_HDL_Hash (N); + when N_HDL_Bool => return N; when others => Error_Kind ("rewrite_boolean", N); diff --git a/src/psl/psl-subsets.adb b/src/psl/psl-subsets.adb index 95f8d781c..dc677cb21 100644 --- a/src/psl/psl-subsets.adb +++ b/src/psl/psl-subsets.adb @@ -190,7 +190,8 @@ package body PSL.Subsets is | N_False | N_Number | N_EOS - | N_HDL_Expr => + | N_HDL_Expr + | N_HDL_Bool => null; end case; end Check_Simple; diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index c962998a7..d7fe43c78 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -2690,7 +2690,7 @@ package body Synth.Stmts is use PSL.Nodes; begin case Get_Kind (Expr) is - when N_HDL_Expr => + when N_HDL_Bool => declare E : constant Vhdl.Types.Vhdl_Node := Get_HDL_Node (Expr); begin @@ -2707,8 +2707,7 @@ package body Synth.Stmts is Edge : Net; begin -- Handle edge (as it can be in default clock). - if Get_Kind (L) = N_HDL_Expr and then Get_Kind (R) = N_HDL_Expr - then + if Get_Kind (L) in N_HDLs and then Get_Kind (R) in N_HDLs then Edge := Synth_Clock_Edge (Syn_Inst, Get_HDL_Node (L), Get_HDL_Node (R)); if Edge /= No_Net then @@ -2735,7 +2734,7 @@ package body Synth.Stmts is | N_EOS => return Build_Const_UB32 (Build_Context, 0, 1); when others => - PSL.Errors.Error_Kind ("translate_psl_expr", Expr); + PSL.Errors.Error_Kind ("synth_psl_expr", Expr); end case; end Synth_PSL_Expression; diff --git a/src/vhdl/simulate/simul-simulation-main.adb b/src/vhdl/simulate/simul-simulation-main.adb index ae768b3d0..fcac44e3d 100644 --- a/src/vhdl/simulate/simul-simulation-main.adb +++ b/src/vhdl/simulate/simul-simulation-main.adb @@ -374,7 +374,8 @@ package body Simul.Simulation.Main is use PSL.Nodes; begin case Get_Kind (Expr) is - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => declare E : constant Iir := Get_HDL_Node (Expr); Rtype : constant Iir := Get_Base_Type (Get_Type (E)); diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb index 5211451e3..c10c0d24f 100644 --- a/src/vhdl/translate/trans-chap9.adb +++ b/src/vhdl/translate/trans-chap9.adb @@ -376,7 +376,8 @@ package body Trans.Chap9 is use PSL.Nodes; begin case Get_Kind (Expr) is - when N_HDL_Expr => + when N_HDL_Bool + | N_HDL_Expr => declare E : constant Iir := Get_HDL_Node (Expr); Rtype : constant Iir := Get_Base_Type (Get_Type (E)); diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb index 3cd7bf736..90ef9cac6 100644 --- a/src/vhdl/vhdl-canon.adb +++ b/src/vhdl/vhdl-canon.adb @@ -850,7 +850,8 @@ package body Vhdl.Canon is use PSL.Nodes; begin case Get_Kind (Expr) is - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => Canon_Expression (Get_HDL_Node (Expr)); when N_True | N_EOS => null; diff --git a/src/vhdl/vhdl-canon_psl.adb b/src/vhdl/vhdl-canon_psl.adb index a130b0a5e..e505b655c 100644 --- a/src/vhdl/vhdl-canon_psl.adb +++ b/src/vhdl/vhdl-canon_psl.adb @@ -28,7 +28,8 @@ package body Vhdl.Canon_PSL is is begin case Get_Kind (Expr) is - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => Canon_Extract_Sensitivity (Get_HDL_Node (Expr), Sensitivity_List); when N_And_Bool | N_Or_Bool => diff --git a/src/vhdl/vhdl-parse_psl.adb b/src/vhdl/vhdl-parse_psl.adb index 4dffbe38a..b664ec5c2 100644 --- a/src/vhdl/vhdl-parse_psl.adb +++ b/src/vhdl/vhdl-parse_psl.adb @@ -734,6 +734,7 @@ package body Vhdl.Parse_Psl is | N_Paren_Bool | N_Fusion_SERE | N_HDL_Expr + | N_HDL_Bool | N_Hdl_Mod_Name | N_Concat_SERE | N_Within_SERE diff --git a/src/vhdl/vhdl-prints.adb b/src/vhdl/vhdl-prints.adb index 59f25a08d..22bfa05cd 100644 --- a/src/vhdl/vhdl-prints.adb +++ b/src/vhdl/vhdl-prints.adb @@ -1959,7 +1959,8 @@ package body Vhdl.Prints is end; when N_Name_Decl => Disp_Ident (Ctxt, Get_Identifier (N)); - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => Print (Ctxt, Vhdl_Node (PSL.Nodes.Get_HDL_Node (N))); -- FIXME: this is true only when using the scanner. -- Print_Expr (Node (Get_HDL_Node (N))); diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb index ca9192cb2..f82299f44 100644 --- a/src/vhdl/vhdl-sem_psl.adb +++ b/src/vhdl/vhdl-sem_psl.adb @@ -130,15 +130,24 @@ package body Vhdl.Sem_Psl is -- Get the named entity for names in order to hash it. declare Name : Iir; + Hnode : PSL_Node; + N : PSL_Node; begin Name := Get_Named_Entity (Expr); if Name /= Null_Iir then - return PSL.Hash.Get_PSL_Node (HDL_Node (Name)); + Hnode := PSL.Hash.Get_PSL_Node (HDL_Node (Name)); + N := Create_Node (N_HDL_Expr); + Set_Location (N, Get_Location (Expr)); + Set_HDL_Node (N, HDL_Node (Expr)); + Set_HDL_Hash (N, Hnode); + return N; end if; end; when others => null; end case; + + -- Default. return PSL.Hash.Get_PSL_Node (HDL_Node (Expr)); end Convert_Bool; @@ -615,7 +624,8 @@ package body Vhdl.Sem_Psl is end Rewrite_Monadic_Operator; begin case Get_Kind (Prop) is - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => return Get_HDL_Node (Prop); when N_And_Bool => return Rewrite_Dyadic_Operator (Prop, Iir_Kind_And_Operator); @@ -631,13 +641,16 @@ package body Vhdl.Sem_Psl is begin Res := Create_Iir (Iir_Kind_Parenthesis_Expression); Set_Location (Res, Get_Location (Prop)); - if Get_Kind (Expr) = N_HDL_Expr then - Hexpr := Get_HDL_Node (Expr); - Set_Expression (Res, Hexpr); - Set_Type (Res, Get_Type (Hexpr)); - else - Set_Expression (Res, Rewrite_As_Boolean_Expression (Expr)); - end if; + case Get_Kind (Expr) is + when N_HDL_Expr + | N_HDL_Bool => + Hexpr := Get_HDL_Node (Expr); + Set_Expression (Res, Hexpr); + Set_Type (Res, Get_Type (Hexpr)); + when others => + Hexpr := Rewrite_As_Boolean_Expression (Expr); + Set_Expression (Res, Hexpr); + end case; return Res; end; when others => @@ -676,7 +689,8 @@ package body Vhdl.Sem_Psl is function Is_Boolean_Assertion (Expr : PSL_Node) return Boolean is begin case Get_Kind (Expr) is - when N_HDL_Expr => + when N_HDL_Expr + | N_HDL_Bool => return True; when N_And_Bool | N_Or_Bool | N_Not_Bool | N_Paren_Bool => return True; -- cgit v1.2.3