From b6f0ff834c3b221ab5b2380c871d76c83808493b Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 12 Mar 2022 18:52:21 +0100
Subject: netlists-disp_verilog: fix disp_const_bit

---
 src/synth/netlists-disp_verilog.adb | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/synth/netlists-disp_verilog.adb b/src/synth/netlists-disp_verilog.adb
index 6bdb9186e..23b9d99e5 100644
--- a/src/synth/netlists-disp_verilog.adb
+++ b/src/synth/netlists-disp_verilog.adb
@@ -272,7 +272,8 @@ package body Netlists.Disp_Verilog is
       Nd : constant Width := W / 32;
       Ld : constant Natural := Natural (W mod 32);
    begin
-      Put ('"');
+      Put_Uns32 (W);
+      Put ("'b");
       if Ld > 0 then
          Disp_Binary_Digits (Get_Param_Uns32 (Inst, Param_Idx (Nd)), 0, Ld);
       end if;
@@ -280,7 +281,6 @@ package body Netlists.Disp_Verilog is
          Disp_Binary_Digits
            (Get_Param_Uns32 (Inst, Param_Idx (I - 1)), 0, 32);
       end loop;
-      Put ('"');
    end Disp_Const_Bit;
 
    procedure Disp_Const_Log (Inst : Instance)
-- 
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