From 9292b6304ffa761b224aacb50f1f58a73bedbad7 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 11 Jan 2023 05:35:10 +0100 Subject: synth: handle file subtype --- src/synth/elab-vhdl_annotations.adb | 3 ++- src/synth/elab-vhdl_types.adb | 7 +++++++ 2 files changed, 9 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/synth/elab-vhdl_annotations.adb b/src/synth/elab-vhdl_annotations.adb index 84bb6e02e..3871631c6 100644 --- a/src/synth/elab-vhdl_annotations.adb +++ b/src/synth/elab-vhdl_annotations.adb @@ -284,7 +284,8 @@ package body Elab.Vhdl_Annotations is when Iir_Kind_Access_Subtype_Definition => Create_Object_Info (Block_Info, Def, Kind_Type); - when Iir_Kind_File_Type_Definition => + when Iir_Kind_File_Type_Definition + | Iir_Kind_File_Subtype_Definition => -- For the File type. Create_Object_Info (Block_Info, Def, Kind_Type); diff --git a/src/synth/elab-vhdl_types.adb b/src/synth/elab-vhdl_types.adb index 9018dc7fe..3749d10b9 100644 --- a/src/synth/elab-vhdl_types.adb +++ b/src/synth/elab-vhdl_types.adb @@ -700,6 +700,13 @@ package body Elab.Vhdl_Types is (Syn_Inst, Get_Designated_Type (Atype)); return Create_Access_Type (Acc_Typ); end; + when Iir_Kind_File_Subtype_Definition => + -- Same as parent. + declare + Parent_Type : constant Node := Get_Parent_Type (Atype); + begin + return Get_Subtype_Object (Syn_Inst, Parent_Type); + end; when Iir_Kind_Record_Type_Definition | Iir_Kind_Array_Type_Definition => return Get_Subtype_Object (Syn_Inst, Atype); -- cgit v1.2.3