From 8c367d78bc621b9f339042f5d456da94dd0b7861 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 28 Sep 2022 06:54:29 +0200 Subject: synth: handle guard signal in expressions --- src/synth/synth-vhdl_expr.adb | 1 + src/synth/synth-vhdl_stmts.adb | 1 + 2 files changed, 2 insertions(+) (limited to 'src') diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb index 204a28f04..fdbd5c302 100644 --- a/src/synth/synth-vhdl_expr.adb +++ b/src/synth/synth-vhdl_expr.adb @@ -672,6 +672,7 @@ package body Synth.Vhdl_Expr is | Iir_Kind_Variable_Declaration | Iir_Kind_Interface_Variable_Declaration | Iir_Kind_Signal_Declaration + | Iir_Kind_Guard_Signal_Declaration | Iir_Kind_Interface_Constant_Declaration | Iir_Kind_Constant_Declaration | Iir_Kind_Iterator_Declaration diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index bf30d8e08..d53773ded 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -139,6 +139,7 @@ package body Synth.Vhdl_Stmts is Assign_Base (Inter_Inst); when Iir_Kind_Variable_Declaration | Iir_Kind_Signal_Declaration + | Iir_Kind_Guard_Signal_Declaration | Iir_Kind_Constant_Declaration | Iir_Kind_File_Declaration | Iir_Kind_Non_Object_Alias_Declaration -- cgit v1.2.3