From 79fc4b05891c91db4cc33f82373b8a0792c41e02 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 1 Feb 2020 11:42:09 +0100
Subject: ghdllocal: add command --elab-order

---
 src/ghdldrv/ghdlcomp.adb  |  2 +-
 src/ghdldrv/ghdllocal.adb | 71 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 72 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/ghdldrv/ghdlcomp.adb b/src/ghdldrv/ghdlcomp.adb
index 941ee62e9..5a5ae3536 100644
--- a/src/ghdldrv/ghdlcomp.adb
+++ b/src/ghdldrv/ghdlcomp.adb
@@ -799,7 +799,7 @@ package body Ghdlcomp is
          end if;
    end Perform_Action;
 
-      --  Command Gen_Makefile.
+   --  Command Gen_Makefile.
    type Command_Gen_Makefile is new Command_Lib with null record;
    function Decode_Command (Cmd : Command_Gen_Makefile; Name : String)
                            return Boolean;
diff --git a/src/ghdldrv/ghdllocal.adb b/src/ghdldrv/ghdllocal.adb
index 79a6d0006..01d4e6279 100644
--- a/src/ghdldrv/ghdllocal.adb
+++ b/src/ghdldrv/ghdllocal.adb
@@ -1707,6 +1707,76 @@ package body Ghdllocal is
       end if;
    end Extract_Elab_Unit;
 
+   --  Command Elab_Order.
+   type Command_Elab_Order is new Command_Lib with null record;
+   function Decode_Command (Cmd : Command_Elab_Order; Name : String)
+                           return Boolean;
+   function Get_Short_Help (Cmd : Command_Elab_Order) return String;
+   procedure Perform_Action (Cmd : Command_Elab_Order;
+                             Args : Argument_List);
+
+   function Decode_Command (Cmd : Command_Elab_Order; Name : String)
+                           return Boolean
+   is
+      pragma Unreferenced (Cmd);
+   begin
+      return Name = "--elab-order";
+   end Decode_Command;
+
+   function Get_Short_Help (Cmd : Command_Elab_Order) return String
+   is
+      pragma Unreferenced (Cmd);
+   begin
+      return "--elab-order [OPTS] UNIT [ARCH]  Display ordered source files";
+   end Get_Short_Help;
+
+   function Is_Makeable_File (File : Iir_Design_File) return Boolean is
+   begin
+      if File = Vhdl.Std_Package.Std_Standard_File then
+         return False;
+      end if;
+      return True;
+   end Is_Makeable_File;
+
+   procedure Perform_Action (Cmd : Command_Elab_Order;
+                             Args : Argument_List)
+   is
+      pragma Unreferenced (Cmd);
+      use Ada.Command_Line;
+      use Name_Table;
+
+      Prim_Id : Name_Id;
+      Sec_Id : Name_Id;
+      Files_List : Iir_List;
+      File : Iir_Design_File;
+      Files_It : List_Iterator;
+
+      Dir_Id : Name_Id;
+
+      Next_Arg : Natural;
+   begin
+      Extract_Elab_Unit ("--elab-order", Args, Next_Arg, Prim_Id, Sec_Id);
+      Setup_Libraries (True);
+      Files_List := Build_Dependence (Prim_Id, Sec_Id);
+
+      Files_It := List_Iterate (Files_List);
+      while Is_Valid (Files_It) loop
+         File := Get_Element (Files_It);
+         Dir_Id := Get_Design_File_Directory (File);
+         if not Is_Makeable_File (File)
+           or else Dir_Id /= Files_Map.Get_Home_Directory
+         then
+            --  Builtin file.
+            null;
+         else
+            --  Lib := Get_Library (File);
+            Put (Image (Get_Design_File_Filename (File)));
+            New_Line;
+         end if;
+         Next (Files_It);
+      end loop;
+   end Perform_Action;
+
    procedure Register_Commands is
    begin
       Register_Command (new Command_Import);
@@ -1717,6 +1787,7 @@ package body Ghdllocal is
       Register_Command (new Command_Remove);
       Register_Command (new Command_Copy);
       Register_Command (new Command_Disp_Standard);
+      Register_Command (new Command_Elab_Order);
       Register_Command (new Command_Find_Top);
       Register_Command (new Command_Bug_Box);
    end Register_Commands;
-- 
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