From 79a93b9ff2e6787ef2185104188e768b4d02e53f Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 7 May 2022 06:50:29 +0200 Subject: synth-vhdl_insts: handle interfaces of type interface type. Fix #2053 --- src/synth/synth-vhdl_insts.adb | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/synth/synth-vhdl_insts.adb b/src/synth/synth-vhdl_insts.adb index 6175d5d8e..458981f37 100644 --- a/src/synth/synth-vhdl_insts.adb +++ b/src/synth/synth-vhdl_insts.adb @@ -377,6 +377,17 @@ package body Synth.Vhdl_Insts is end case; end Count_Nbr_Ports; + function Get_Type2 (N : Node) return Node + is + Res : Node; + begin + Res := Get_Type (N); + if Get_Kind (Res) = Iir_Kind_Interface_Type_Definition then + Res := Get_Associated_Type (Res); + end if; + return Res; + end Get_Type2; + procedure Build_Ports_Desc (Descs : in out Port_Desc_Array; Idx : in out Port_Nbr; Pkind : Port_Kind; @@ -405,7 +416,7 @@ package body Synth.Vhdl_Insts is | Type_Unbounded_Record => declare Els : constant Node_Flist := Get_Elements_Declaration_List - (Get_Type (Inter)); + (Get_Type2 (Inter)); El : Node; begin for I in Typ.Rec.E'Range loop -- cgit v1.2.3