From 4ce5f0c046685ad630f9eb6140e87a66be020f94 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 4 Aug 2022 08:56:18 +0200 Subject: synth-vhdl_oper: remove check for positive rotation amount. Fix #2159 --- src/synth/synth-vhdl_oper.adb | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src') diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index 274306245..9cc3f5e95 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -699,10 +699,8 @@ package body Synth.Vhdl_Oper is Amt := Amt mod Int64 (Left.Typ.W); R1 := Build_Const_UB32 (Ctxt, Uns32 (Amt), Right.Typ.W); Set_Location (R1, Right_Expr); - elsif not Is_Positive (Right) then - Error_Msg_Synth (+Expr, "rotation quantity must be unsigned"); - return Left; else + -- The amount should be positive. R1 := Get_Net (Ctxt, Right); Ww := Netlists.Utils.Clog2 (Left.Typ.W); if Right.Typ.W >= Ww then -- cgit v1.2.3