From 46a5e8cd1738fef7469a460fe8c5524bbb74439a Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 2 Feb 2023 18:39:36 +0100 Subject: TBM --- src/vhdl/translate/trans-chap2.adb | 2 +- src/vhdl/translate/trans-chap4.adb | 57 ++++++++++++++++++++++++++++++++------ src/vhdl/translate/trans-chap4.ads | 3 ++ src/vhdl/translate/trans-chap5.adb | 6 ++-- 4 files changed, 56 insertions(+), 12 deletions(-) (limited to 'src') diff --git a/src/vhdl/translate/trans-chap2.adb b/src/vhdl/translate/trans-chap2.adb index 2aac3e4f3..0ab31a3ee 100644 --- a/src/vhdl/translate/trans-chap2.adb +++ b/src/vhdl/translate/trans-chap2.adb @@ -816,7 +816,7 @@ package body Trans.Chap2 is end if; else if Header /= Null_Iir then - Chap4.Translate_Generic_Chain (Header); + Chap4.Translate_Generic_Association_Chain (Header); end if; Chap4.Translate_Declaration_Chain (Decl); if not Is_Nested then diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index b0ea8fae3..41a83b8c8 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -1838,6 +1838,17 @@ package body Trans.Chap4 is end loop; end Translate_Port_Chain; + procedure Translate_Interface_Package (Decl : Iir) is + begin + if Get_Generic_Map_Aspect_Chain (Decl) /= Null_Iir then + -- The package is instantiated by the interface. + Chap2.Translate_Package_Instantiation_Declaration (Decl); + else + -- Need a formal + Create_Package_Interface (Decl); + end if; + end Translate_Interface_Package; + procedure Translate_Generic_Chain (Parent : Iir) is Decl : Iir; @@ -1848,15 +1859,10 @@ package body Trans.Chap4 is when Iir_Kinds_Interface_Object_Declaration => Create_Object (Decl); when Iir_Kind_Interface_Package_Declaration => - if Get_Generic_Map_Aspect_Chain (Decl) /= Null_Iir then - -- The package is instantiated by the interface. - Chap2.Translate_Package_Instantiation_Declaration (Decl); - else - -- Need a formal - Create_Package_Interface (Decl); - end if; - when Iir_Kind_Interface_Type_Declaration - | Iir_Kinds_Interface_Subprogram_Declaration => + Translate_Interface_Package (Decl); + when Iir_Kind_Interface_Type_Declaration => + null; + when Iir_Kinds_Interface_Subprogram_Declaration => null; when others => Error_Kind ("translate_generic_chain", Decl); @@ -1865,6 +1871,39 @@ package body Trans.Chap4 is end loop; end Translate_Generic_Chain; + procedure Translate_Generic_Association_Chain (Parent : Iir) + is + Assoc : Iir; + Inter : Iir; + Assoc_Inter : Iir; + begin + Assoc := Get_Generic_Map_Aspect_Chain (Parent); + Assoc_Inter := Get_Generic_Chain (Parent); + while Is_Valid (Assoc) loop + Inter := Get_Association_Interface (Assoc, Assoc_Inter); + case Iir_Kinds_Interface_Declaration (Get_Kind (Inter)) is + when Iir_Kinds_Interface_Object_Declaration => + Create_Object (Inter); + when Iir_Kind_Interface_Package_Declaration => + Translate_Interface_Package (Inter); + when Iir_Kind_Interface_Type_Declaration => + declare + Def : Iir; + begin + Def := Get_Actual (Assoc); + if Is_Proper_Subtype_Indication (Def) then + Chap3.Translate_Subtype_Definition (Def, True); + end if; + end; + when Iir_Kinds_Interface_Subprogram_Declaration => + null; + when others => + Error_Kind ("translate_generic_association_chain", Inter); + end case; + Next_Association_Interface (Assoc, Assoc_Inter); + end loop; + end Translate_Generic_Association_Chain; + -- Create instance record for a component. procedure Translate_Component_Declaration (Decl : Iir) is diff --git a/src/vhdl/translate/trans-chap4.ads b/src/vhdl/translate/trans-chap4.ads index 6a5431ff5..02ff9a70e 100644 --- a/src/vhdl/translate/trans-chap4.ads +++ b/src/vhdl/translate/trans-chap4.ads @@ -88,6 +88,9 @@ package Trans.Chap4 is procedure Translate_Port_Chain (Parent : Iir); procedure Translate_Generic_Chain (Parent : Iir); + -- Also handle interface type. + procedure Translate_Generic_Association_Chain (Parent : Iir); + -- Elaborate signal subtypes and allocate the storage for the object. -- If HAS_COPY is true, do not allocate storage for values, as the values -- will be directly referenced from the association. diff --git a/src/vhdl/translate/trans-chap5.adb b/src/vhdl/translate/trans-chap5.adb index 75ccca6b3..2c91f36f2 100644 --- a/src/vhdl/translate/trans-chap5.adb +++ b/src/vhdl/translate/trans-chap5.adb @@ -921,8 +921,10 @@ package body Trans.Chap5 is Body_Addr); Set_Map_Env (Actual_Env); end; - when Iir_Kind_Association_Element_Type - | Iir_Kind_Association_Element_Subprogram => + when Iir_Kind_Association_Element_Type => + -- TODO: also elaborate the type ?? + null; + when Iir_Kind_Association_Element_Subprogram => null; when others => Error_Kind ("elab_generic_map_aspect(1)", Assoc); -- cgit v1.2.3