From 3c6df8a24f8ebfe5e1e95d1b718a9ca97f17d5d7 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Thu, 21 Apr 2022 07:23:07 +0200
Subject: netlists-disp_verilog: output default value for pmux.  Fix #2041

---
 src/synth/netlists-disp_verilog.adb | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src')

diff --git a/src/synth/netlists-disp_verilog.adb b/src/synth/netlists-disp_verilog.adb
index 23b9d99e5..18c5091df 100644
--- a/src/synth/netlists-disp_verilog.adb
+++ b/src/synth/netlists-disp_verilog.adb
@@ -764,6 +764,7 @@ package body Netlists.Disp_Verilog is
            (Get_Input_Net (Inst, Port_Idx (2 + W - I)), Inst, Conv_None);
          Put_Line (";");
       end loop;
+      Disp_Template ("      default: \o0 <= \i1;" & NL, Inst);
       Disp_Template ("    endcase" & NL, Inst);
    end Disp_Pmux;
 
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