From eaf363fa47f047d62a987804e1f86c2a6ca460f7 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 28 Nov 2022 14:10:16 +0100 Subject: synth-vhdl_eval(eval_static_predefined_function_call): handle all operations --- src/vhdl/vhdl-evaluation.adb | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src/vhdl') diff --git a/src/vhdl/vhdl-evaluation.adb b/src/vhdl/vhdl-evaluation.adb index 819d731e4..d3e7f494c 100644 --- a/src/vhdl/vhdl-evaluation.adb +++ b/src/vhdl/vhdl-evaluation.adb @@ -1073,12 +1073,11 @@ package body Vhdl.Evaluation is Left_Mt := Convert_Node_To_Memtyp (Left); if Right /= Null_Iir then Right_Mt := Convert_Node_To_Memtyp (Right); - Res_Mt := Eval_Static_Dyadic_Predefined - (null, Imp, Res_Typ, Left_Mt, Right_Mt, Orig); else - Res_Mt := Eval_Static_Monadic_Predefined - (null, Imp, Left_Mt, Orig); + Right_Mt := Null_Memtyp; end if; + Res_Mt := Eval_Static_Predefined_Function_Call + (null, Left_Mt, Right_Mt, Res_Typ, Orig); Res := Convert_Memtyp_To_Node (Res_Mt, Res_Type, Orig); Release_Expr_Pool (Marker); -- cgit v1.2.3