From e0ca8bf0b0d8049c7e9f7fe53f7ed942fac61453 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 13 Jun 2020 12:25:01 +0200 Subject: vhdl: --std93c is now an alias for --std=93 -frelaxed This simplifies the definition of --std=93c --- src/vhdl/vhdl-std_package.adb | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/vhdl/vhdl-std_package.adb') diff --git a/src/vhdl/vhdl-std_package.adb b/src/vhdl/vhdl-std_package.adb index f2ba54382..1fc5fcd8a 100644 --- a/src/vhdl/vhdl-std_package.adb +++ b/src/vhdl/vhdl-std_package.adb @@ -868,7 +868,7 @@ package body Vhdl.Std_Package is Constraint : Iir_Range_Expression; begin - if Vhdl_Std >= Vhdl_93c then + if Vhdl_Std >= Vhdl_93 then Time_Staticness := Globally; else Time_Staticness := Locally; @@ -953,7 +953,7 @@ package body Vhdl.Std_Package is -- VHDL93 -- subtype DELAY_LENGTH is TIME range 0 to TIME'HIGH - if Vhdl_Std >= Vhdl_93c then + if Vhdl_Std >= Vhdl_93 then Delay_Length_Subtype_Definition := Create_Std_Iir (Iir_Kind_Physical_Subtype_Definition); Set_Subtype_Type_Mark @@ -1258,7 +1258,7 @@ package body Vhdl.Std_Package is -- VHDL93: -- type file_open_kind is (read_mode, write_mode, append_mode); - if Vhdl_Std >= Vhdl_93c then + if Vhdl_Std >= Vhdl_93 then File_Open_Kind_Type_Definition := Create_Std_Iir (Iir_Kind_Enumeration_Type_Definition); Set_Base_Type (File_Open_Kind_Type_Definition, @@ -1297,7 +1297,7 @@ package body Vhdl.Std_Package is -- VHDL93: -- type file_open_status is -- (open_ok, status_error, name_error, mode_error); - if Vhdl_Std >= Vhdl_93c then + if Vhdl_Std >= Vhdl_93 then File_Open_Status_Type_Definition := Create_Std_Iir (Iir_Kind_Enumeration_Type_Definition); Set_Base_Type (File_Open_Status_Type_Definition, @@ -1337,7 +1337,7 @@ package body Vhdl.Std_Package is -- VHDL93: -- attribute FOREIGN: string; - if Vhdl_Std >= Vhdl_93c then + if Vhdl_Std >= Vhdl_93 then Foreign_Attribute := Create_Std_Decl (Iir_Kind_Attribute_Declaration); Set_Std_Identifier (Foreign_Attribute, Name_Foreign); Set_Type_Mark (Foreign_Attribute, @@ -1445,7 +1445,7 @@ package body Vhdl.Std_Package is Change_Unit (Get_Right_Limit (Rng), Prim); -- Adjust range of DELAY_LENGTH. - if Vhdl_Std >= Vhdl_93c then + if Vhdl_Std >= Vhdl_93 then Rng := Get_Range_Constraint (Delay_Length_Subtype_Definition); Change_Unit (Get_Left_Limit (Rng), Prim); Change_Unit (Get_Right_Limit (Rng), Prim); -- cgit v1.2.3