From 5460489790f0b2934b1b61c8610b798ab7a47d4d Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 30 Oct 2019 18:39:34 +0100 Subject: vhdl: allow attributes in vunit declarations. --- src/vhdl/vhdl-sem_psl.adb | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/vhdl/vhdl-sem_psl.adb') diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb index 3843a3ff7..ca9192cb2 100644 --- a/src/vhdl/vhdl-sem_psl.adb +++ b/src/vhdl/vhdl-sem_psl.adb @@ -1010,7 +1010,9 @@ package body Vhdl.Sem_Psl is | Iir_Kind_Function_Declaration | Iir_Kind_Procedure_Declaration | Iir_Kind_Function_Body - | Iir_Kind_Procedure_Body => + | Iir_Kind_Procedure_Body + | Iir_Kind_Attribute_Declaration + | Iir_Kind_Attribute_Specification => Sem_Decls.Sem_Declaration (Item, Prev_Item, False, Attr_Spec_Chain); when Iir_Kind_Concurrent_Simple_Signal_Assignment => -- cgit v1.2.3