From 14ca9272bdf9a6a33944e92d4eac0dfea79634ee Mon Sep 17 00:00:00 2001 From: Ondrej Ille Date: Fri, 26 Mar 2021 21:56:25 +0100 Subject: psl, vhdl: Extend semantic pass for PSL to allow "assert never " with suffixed repetition operator without surrounding sequence braces. --- src/vhdl/vhdl-sem_psl.adb | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/vhdl/vhdl-sem_psl.adb') diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb index c73681b7c..5b3248aef 100644 --- a/src/vhdl/vhdl-sem_psl.adb +++ b/src/vhdl/vhdl-sem_psl.adb @@ -505,6 +505,16 @@ package body Vhdl.Sem_Psl is case Get_Kind (Prop) is when N_Braced_SERE => return Sem_Sequence (Prop); + when N_Star_Repeat_Seq + | N_Equal_Repeat_Seq + | N_Plus_Repeat_Seq + | N_Goto_Repeat_Seq => + Res := Get_Sequence (Prop); + if Res /= Null_PSL_Node then + Res := Sem_Sequence (Get_Sequence (Prop)); + Set_Sequence (Prop, Res); + end if; + return Prop; when N_Always | N_Never => -- By extension, clock_event is allowed within outermost -- cgit v1.2.3