From c98cd530f2e58ecff06c6065c6e7427bf727875d Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sun, 23 Jun 2019 18:13:41 +0200 Subject: synth: handle discrete choice in case statements. --- src/vhdl/vhdl-sem_expr.adb | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/vhdl/vhdl-sem_expr.adb') diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb index 2bfe77b49..e434ce0c1 100644 --- a/src/vhdl/vhdl-sem_expr.adb +++ b/src/vhdl/vhdl-sem_expr.adb @@ -2196,12 +2196,12 @@ package body Vhdl.Sem_Expr is is -- Compare two elements of ARR. -- Return true iff OP1 < OP2. - function Lt (Op1, Op2 : Natural) return Boolean is + function Lt (Op1, Op2 : Natural) return Boolean + is + E1 : constant Iir := Get_Choice_Expression (Info.Arr (Op1)); + E2 : constant Iir := Get_Choice_Expression (Info.Arr (Op2)); begin - return Compare_String_Literals - (Get_Choice_Expression (Info.Arr (Op1)), - Get_Choice_Expression (Info.Arr (Op2))) - = Compare_Lt; + return Compare_String_Literals (E1, E2) = Compare_Lt; end Lt; procedure Swap (From : Natural; To : Natural) is -- cgit v1.2.3